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FTMx_FMS field descriptions (continued)
Field
Description
If another fault condition is detected at the corresponding fault input before the clearing sequence is
completed, the sequence is reset so FAULTF2 remains set after the clearing sequence is completed for
the earlier fault condition.
0
No fault condition was detected at the fault input.
1
A fault condition was detected at the fault input.
1
FAULTF1
Fault Detection Flag 1
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected at the fault input.
Clear FAULTF1 by reading the FMS register while FAULTF1 is set and then writing a 0 to FAULTF1 while
there is no existing fault condition at the corresponding fault input. Writing a 1 to FAULTF1 has no effect.
FAULTF1 bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at the corresponding fault input before the clearing sequence is
completed, the sequence is reset so FAULTF1 remains set after the clearing sequence is completed for
the earlier fault condition.
0
No fault condition was detected at the fault input.
1
A fault condition was detected at the fault input.
0
FAULTF0
Fault Detection Flag 0
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected at the fault input.
Clear FAULTF0 by reading the FMS register while FAULTF0 is set and then writing a 0 to FAULTF0 while
there is no existing fault condition at the corresponding fault input. Writing a 1 to FAULTF0 has no effect.
FAULTF0 bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at the corresponding fault input before the clearing sequence is
completed, the sequence is reset so FAULTF0 remains set after the clearing sequence is completed for
the earlier fault condition.
0
No fault condition was detected at the fault input.
1
A fault condition was detected at the fault input.
39.3.19 Input Capture Filter Control (FTMx_FILTER)
This register selects the filter value for the inputs of channels.
Channels 4, 5, 6 and 7 do not have an input filter.
NOTE
Writing to the FILTER register has immediate effect and must
be done only when the channels 0, 1, 2, and 3 are not in input
modes. Failure to do this could result in a missing valid signal.
Chapter 39 FlexTimer Module (FTM)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors
931
Содержание K22F series
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Страница 150: ...Private Peripheral Bus PPB memory map K22F Sub Family Reference Manual Rev 4 08 2016 150 NXP Semiconductors...
Страница 168: ...Module clocks K22F Sub Family Reference Manual Rev 4 08 2016 168 NXP Semiconductors...
Страница 198: ...Security Interactions with other Modules K22F Sub Family Reference Manual Rev 4 08 2016 198 NXP Semiconductors...
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Страница 1040: ...Example configuration for chained timers K22F Sub Family Reference Manual Rev 4 08 2016 1040 NXP Semiconductors...
Страница 1118: ...Device mode IRC48 operation K22F Sub Family Reference Manual Rev 4 08 2016 1118 NXP Semiconductors...
Страница 1122: ...USB Voltage Regulator Module Signal Descriptions K22F Sub Family Reference Manual Rev 4 08 2016 1122 NXP Semiconductors...
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