Distributor of NXP Semiconductors: Excellent Integrated System Limited
Datasheet of MPC8569E-MDS-PB - BOARD MOD DEV SYSTEM MPC8569
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MPC8569E-MDS-PB Hardware Getting Started, Rev. 3.1
Freescale Semiconductor
23
Board Control Status Registers (BCSR)
10.9
BCSR8
Table 16. BCSR8 Register
10.10 BCSR9
Table 17. BCSR9 Register
Bit Config
Signals
Function
Default
Att
[0]
UCC2_GETH
• 1: Enable UCC2_GETH, RGMII, or RTBI
• 0: Disable UCC2_GETH
OR
enable UCC2_RMII
(RMII2) on PIB
[1]
R,W
[1]
UCC2_RGMII
• 1: Enable RGMII
• 0: Disable RTBI
AND
enable RMII on PIB
[1]
R,W
[2]
UCC2_RTBI
• 1: Enable RTBI
• 0: Disable RGMII
AND
enable RMII on PIB
[0]
R,W
[3]
G2DIS_125
• 1: Disable PHY2 clock_out 125MHz
• 0: Enable PHY2 clock_out 125MHz
[0]
R,W
[4]
G2ENA_XC
• 1: Enable
• 0: Disable
[0]
R,W
[5]
CS_NOR
• 1: Boot from NAND_FLASH
• 0: Boot from NOR_FLASH
[0]
R,W
[6]
UEM Marvell PHY RESET
• 1: RESET UEM3 (UCC3) and UEM4 (UCC4)
• 0: Normal operation
[0]
R,W
[7]
DDRDRV_SEL
• 1: MEMC1,2: MDIC0,1=36.5OHm
• 0: MEMC1,2: MDIC0,1=18OHm
[1]
R,W
Bit
Config Signals
Function
Default
Att
[0]
UCC3_GETH
• 1: Enable UCC3_GETH
– Use UEM module on PB for RGMII or RTBI.
• 0: Disable UCC3_GETH
OR
enable (depending upon
UCC3_RMII bit) UCC3_RMII (RMII3) on PIB or
TDM1C
[1]
R,W
[1]
UCC3_RGMII
• 1: Enable RGMII on UEM
• 0: Disable RTBI on UEM
AND
enable RMII3 on PIB
[1]
R,W
[2]
UCC3_RTBI
• 1: Enable RTBI on UEM
• 0: Disable RGMII on UEM
AND
enable RMII3 on PIB
[0]
R,W
[3]
UCC3_RMII
• If UCC3_GETH = 0
– then bit = 1 enables UCC3_RMII on PIB
– then bit =0 enables TDM1C and UPC1_DEV2
• If UCC3_GETH = 1
– then bit has no effect
[0]
R,W
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