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M5251C3 Evaluation Board Users Guide, Rev. 0
2-4
Freescale Semiconductor
of the exception table is made at address $00000000 in SDRAM. To take over an exception vector, the user
places the address of the exception handler in the appropriate vector in the vector table located at
0x00000000, and then points the VBR to 0x00000000.
The Software Watchdog Timer is disabled and internal timers are placed in a stop condition. Interrupt
controller registers initialized with unique interrupt level/priority pairs. Refer to the dBUG source files on
the ColdFire website (www.freescale.com/coldfire) for the complete initialization code sequence.
After initialization, the terminal displays the following:
Hard Reset
DRAM Size: 8M
Copyright 1995-2005 Freescale Semiconductor, Inc. All Rights Reserved.
ColdFire MCF5251 EVS Firmware v3b.00.1a (Build XXX on XXX)
Enter 'help' for help.
dBUG>
If you did not get this response check the setup, refer to
Section 1.7, “System Power-up and Initial
Other means can be used to re-initialize the M5251C3 Computer Board firmware. These means are
discussed in
Section 2.2.2.1, “Hard RESET Button
Section 2.2.2.2, “ABORT Button
,” and
Section 2.2.2.3, “Software Reset Command
2.2.2.1
Hard RESET Button
Hard RESET (S1) is the red button. Pressing this button causes all processes to terminate, resets the
MCF5251 processor and board logic, and restarts the dBUG firmware. Pressing the RESET button would
be the appropriate action if all else fails.
2.2.2.2
ABORT Button
ABORT (S2) is the button located next to the RESET button. The abort function causes an interrupt of the
present processing (a level 7 interrupt on MCF5251) and gives control to the dBUG firmware. This action
differs from RESET in that no processor register or memory contents are changed, the processor and
peripherals are not reset, and dBUG is not restarted. Also, in response to depressing the ABORT button,
the contents of the MCF5251 core internal registers are displayed.
The abort function is most appropriate when software is being debugged. The user can interrupt the
processor without destroying the present state of the system. This is accomplished by forcing a
non-maskable interrupt that will call a dBUG routine that will save the current state of the registers to
shadow registers in the monitor for display to the user. The user will be returned to the ROM monitor
prompt after exception handling.
2.2.2.3
Software Reset Command
dBUG’s command—“RESET”—causes the dBUG to restart as if a hardware reset was invoked.
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