Table 37-225. Interrupt Summary (continued)
Core Interrupt
Interrupt Flag
Interrupt Enable
Name
Description
PWM_CAP3
SM3STS[CFA1],
SM3STS[CFA0],
SM3STS[CFB1],
SM3STS[CFB0],
SM3STS[CFX1],
SM3STS[CFX0]
SM3INTEN[CFA1IE],
SM3INTEN[CFA0IE],
SM3INTEN[CFB1IE],
SM3INTEN[CFB0IE],
SM3INTEN[CFX1IE],
SM3INTEN[CFX0IE
Submodule 3 input
capture interrupt
Input capture event has
occurred
PWM_RELOAD3
SM3STS[RF]
SM3INTEN[RIE]
Submodule 3 reload
interrupt
Reload event has
occurred
PWM_RERR
SM0STS[REF]
SM0INTEN[REIE]
Submodule 0 reload
error interrupt
Reload error has
occurred
SM1STS[REF]
SM1INTEN[REIE]
Submodule 1 reload
error interrupt
SM2STS[REF]
SM2INTEN[REIE]
Submodule 2 reload
error interrupt
SM3STS[REF]
SM3INTEN[REIE]
Submodule 3 reload
error interrupt
PWM_FAULT
FSTS[FFLAG]
FCTRL[FIE]
Fault input interrupt
Fault condition has
been detected
37.8 DMA
Each submodule can request a DMA read access for its capture FIFOs and a DMA write
request for its double buffered VALx registers.
Table 37-226. DMA Summary
DMA Request
DMA Enable
Name
Description
Submodule 0
read request
SM0DMAEN[CX0DE]
SM0 Capture FIFO X0
read request
SM0CVAL0 contains a value to be read
SM0DMAEN[CX1DE]
SM0 Capture FIFO X1
read request
SM0CVAL1 contains a value to be read
SM0DMAEN[CA0DE]
SM0 Capture FIFO A0
read request
SM0CVAL2 contains a value to be read
SM0DMAEN[CA1DE]
SM0 Capture FIFO A1
read request
SM0CVAL3 contains a value to be read
SM0DMAEN[CB0DE]
SM0 Capture FIFO B0
read request
SM0CVAL4 contains a value to be read
SM0DMAEN[CB1DE]
SM0 Capture FIFO B1
read request
SM0CVAL5 contains a value to be read
SM0DMAEN[CAPTDE]
SM0 Capture FIFO
read request source
select
Selects source of submodule0 read DMA request
Table continues on the next page...
DMA
KV4x Reference Manual, Rev. 2, 02/2015
860
Preliminary
Freescale Semiconductor, Inc.
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