AN11524
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Application note
Rev. 1 — 17 February 2015
38 of 54
NXP Semiconductors
AN11524
NXQ1TXA6 Evaluation Board
8.7 Summary
To recap the key notes for a successful design:
1. Use 4-layer PCB
–
Layer 1 Component placement and signal trace
–
Layer 2 Clean uninterrupted ground
–
Layer 3 Signal trace
–
Layer 4 Ground and minimal routing trace if required
2. Separate system ground plane from power ground plane and tie them at only one
point
3. Use only components with correct characteristics and ratings
4. Tight current loops in the half-bridge drive stage and DC-to-DC converter
5. Keep decoupling capacitors close by
6. Tune component for performance. Minimal effort if NXQ1TXA6 Evaluation Board is
followed closely
7. Test points for key signal nodes
Fig 28. EMC common mode choke L601
Fig 29. PCB layout of common mode choke L601 in NXQ1TXA6 evaluation board
aaa-015913
J601
C601
SJ601
SJ602
4
3
1
2
C602
C603
L601
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