Nvidia Jetson AGX Xavier Series, Руководство по конструкции

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Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 59
Chapter 8. Gigabit Ethernet
Jetson AGX Xavier provides an RGMII interface to support GBit Ethernet functionality. The
Ethernet PHY, magnetics and RJ45 connector are implemented on the carrier board.
Table 8-1. Jetson AGX Xavier Gigabit Ethernet Pin Descriptions
Pin # Module Pin Name SoC Signal Usage/Description
Usage on NVIDIA
Carrier Board
Direction Pin Type
J5 ENET_INT SOC_GPIO08 Ethernet Interrupt Ethernet PHY Input CMOS – 1.8V
H5 ENET_RST_N SOC_GPIO09 Ethernet Reset Ethernet PHY Output CMOS – 1.8V
C4 RGMII_RD0 EQOS_RD0 Ethernet Receive data bit 0 Ethernet PHY Input CMOS – 1.8V
K6 RGMII_RD1 EQOS_RD1 Ethernet Receive data bit 1 Ethernet PHY Input CMOS – 1.8V
H6 RGMII_RD2 EQOS_RD2 Ethernet Receive data bit 2 Ethernet PHY Input CMOS – 1.8V
E5 RGMII_RD3 EQOS_RD3 Ethernet Receive data bit 3 Ethernet PHY Input CMOS – 1.8V
D5 RGMII_RX_CTL EQOS_RX_CTL Ethernet Receive Control Ethernet PHY Input CMOS – 1.8V
C5 RGMII_RXC EQOS_RXC Ethernet Receive Clock Ethernet PHY Input CMOS – 1.8V
E6 RGMII_SMA_MDC EQOS_SMA_MDC Ethernet Management Clock Ethernet PHY Output CMOS – 1.8V
E7 RGMII_SMA_MDIO EQOS_SMA_MDIO Ethernet Management Data Ethernet PHY Bidir CMOS – 1.8V
J6 RGMII_TD0 EQOS_TD0 Ethernet Transmit data bit 0 Ethernet PHY Output CMOS – 1.8V
G5 RGMII_TD1 EQOS_TD1 Ethernet Transmit data bit 1 Ethernet PHY Output CMOS – 1.8V
J7 RGMII_TD2 EQOS_TD2 Ethernet Transmit data bit 2 Ethernet PHY Output CMOS – 1.8V
G6 RGMII_TD3 EQOS_TD3 Ethernet Transmit data bit 3 Ethernet PHY Output CMOS – 1.8V
K7 RGMII_TX_CTL EQOS_TX_CTL Ethernet Transmit Control Ethernet PHY Output CMOS – 1.8V
B5 RGMII_TXC EQOS_TXC Ethernet Transmit Clock Ethernet PHY Output CMOS – 1.8V
Notes:
1. In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.