CHAPTER 3 CPU FUNCTION
Preliminary User’s Manual U15905EJ1V0UD
92
3.4.9
Notes
Be sure to set the following register first when using the V850ES/SA2 and V850ES/SA3:
•
System wait control register (VSWC)
After setting the VSWC register, set the other registers as necessary.
When using the external bus, initialize each register in the following order after setting the above register.
<1> Set each pin to the control mode by using the port-related registers.
(1) System wait control register (VSWC)
The system wait control register (VSWC) controls wait of bus access to the internal peripheral I/O registers.
Three clocks are required to access an internal peripheral I/O register (without a wait cycle). The V850ES/SA2
and V850ES/SA3 require wait cycles according to the operating frequency. Set the following value to the
VSWC register in accordance with the frequency used.
The VSWC register can be read or written in 8-bit units (address: FFFFF06EH, default value: 77H).
Operating Frequency (f
CLK
)
Set Value of VSWC
2 MHz
≤
f
CLK
< 16.6 MHz
00H
16.6 MHz
≤
f
CLK
< 17 MHz
01H
Содержание V850ES/SA2 UPD703201
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