NEC V850ES/KE1+, Руководство пользователя

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CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0
User’s Manual U16896EJ2V0UD
258
Figure 7-20. Timing Example of Clear & Start Mode Entered by TI010 Pin Valid Edge Input
(CR010 Register: Capture Register, CR011 Register: Capture Register) (3/3)
(c) TOC01 = 13H, PRM01 = 00H, CRC01 = 07H, TMC01 = 0AH
TM01 register
0000H
Operable bits
(TMC013, TMC012)
Capture & count clear input
(TI010 pin input)
Capture register
(CR010)
Capture register
(CR011)
Capture interrupt
(INTTM011)
TO01 pin output
Capture input
(TI011)
Capture interrupt
(INTTM010)
0000H
10
P
O M
Q
R
T
S W
N
L
00
L
L
L N R P T
0000H
M O Q S W
This is an application example where the pulse width of the signal input to the TI010 pin is measured.
By setting the CRC01 register, the count value can be captured to the CR010 register in the phase reverse to
the falling edge of the TI010 pin (i.e., rising edge) and to the CR011 register at the falling edge of the TI010 pin.
The high- and low-level widths of the input pulse can be calculated by the following expressions.
•
High-level width = [CR011 register value] – [CR010 register value]
×
[Count clock cycle]
•
Low-level width = [CR010 register value]
×
[Count clock cycle]
If the reverse phase of the TI010 pin is selected as a trigger to capture the count value to the CR010 register,
the INTTM010 signal is not generated. Read the values of the CR010 and CR011 registers to measure the
pulse width immediately after the INTTM011 signal is generated.
However, if the valid edge specified by the PRM01.ES111 and PRM01.ES110 bits is input to the TI011 pin, the
count value is not captured but the INTTM010 signal is generated. To measure the pulse width of the TI010 pin,
mask the INTTM010 signal when it is not used.