Appendix B
Register-Level Programming — Interrupt Control Register 2
PCI-DIO-96/PXI-6508/PCI-6503 User Manual
B-12
ni.com
Interrupt Control Register 2
Address:
Base a 15 (hex)
Type:
Write-only
Word Size:
8-bit
Bit Map (PCI-DIO-96/PXI-6508):
Bit Map (PCI-6503):
Bit
Name
Description
7–3
X
Reserved.
2
INTEN
Interrupt Enable Bit—If this bit is set, the DIO board
can interrupt the computer. If this bit is cleared, the DIO
board cannot generate interrupts to the computer,
regardless of the status of the bits in Interrupt Control
Register 2.
1–0
X
Reserved on the PCI-6503.
1
CTRIRQ
Counter Interrupt Enable Bit—If this bit is set, the 82C53
counter outputs can interrupt the computer. If this bit is
cleared, the counter outputs have no effect. To avoid a
spurious interrupt, keep INTEN low when you set
CTRIRQ; that is, set CTRIRQ before setting INTEN.
0
CTR1
Counter Select Bit—If this bit is set, the output from
counter 1 of the 82C53 is connected to the interrupt request
circuitry. In this mode, counter 0 of the 82C53 acts as a
frequency scaler for counter 1, which generates the
interrupt. If CTR1 is cleared, the output from counter 0 of
the 82C53 is connected to the interrupt request circuitry.
In this mode, counter 0 generates the interrupt. For more
information, refer to the
section for the 82C53 in this appendix
.
7
6
5
4
3
2
1
0
X
X
X
X
X
INTEN
CTRIRQ
CTR1
7
6
5
4
3
2
1
0
X
X
X
X
X
INTEN
X
X
