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Stereo, Low Power, 96 kHz, 24-Bit
Audio Codec with Integrated PLL
ADAU1961
Rev. 0
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rights of third parties that may re
license is granted by implication
Trademarks and registered trad
MA 02062-9106, U.S.A.
www.analog.com
Inc. All rights reserved.
g Devices is believed to be accurate and reliable. However, no
log Devices for its use, nor for any infringements of patents or other
sult from its use. Specifications subject to change without notice. No
or otherwise under any patent or patent rights of Analog Devices.
emarks are the property of their respective owners.
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Tel: 781.329.4700
Fax: 781.461.3113
©2010 Analog Devices,
FEATURES
24-bit stereo audio ADC and DAC: >98 dB SNR
Sampling rates from 8 kHz to 96 kHz
Low power: 17 mW record, 18 mW playback, 48 kHz
6 analog input pins, configurable for single-ended or
differential inputs
Flexible analog input/output mixers
Stereo digital microphone input
Analog outputs: 2 differential stereo, 2 single-ended stereo,
1 mono headphone output driver
PLL supporting input clocks from 8 MHz to 27 MHz
Analog automatic level control (ALC)
Microphone bias reference voltage
Analog and digital I/O: 3.3 V
I
2
C and SPI control interfaces
Digital audio serial data I/O: stereo and time-division
multiplexing (TDM) modes
Software-controllable clickless mute
32-lead, 5 mm × 5 mm LFCSP
−40°C to +105°C operating temperature range
Qualified for automotive applications
APPLICATIONS
Automotive head units
Automotive amplifiers
Navigation systems
Rear-seat entertainment systems
GENERAL DESCRIPTION
The ADAU1961 is a low power, stereo audio codec that supports
stereo 48 kHz record and playback at 35 mW from a 3.3 V analog
supply. The stereo audio ADCs and DACs support sample rates
from 8 kHz to 96 kHz as well as a digital volume control.
The record path includes an integrated microphone bias circuit
and six inputs. The inputs can be mixed and muxed before the
ADC, or they can be configured to bypass the ADC. The
ADAU1961 includes a stereo digital microphone input.
The ADAU1961 includes five high power output drivers (two
differential and three single-ended), supporting stereo head-
phones, an earpiece, or other output transducer. AC-coupled
or capless configurations are supported. Individual fine level
controls are supported on all analog outputs. The output mixer
stage allows for flexible routing of audio.
The serial control bus supports the I
2
C and SPI protocols. The
serial audio bus is programmable for I
2
S, left-/right-justified,
and TDM modes. A programmable PLL supports flexible clock
generation for all standard integer rates and fractional master
clocks from 8 MHz to 27 MHz.
FUNCTIONAL BLOCK DIAGRAM
CM
IO
V
D
D
DG
ND
DV
DD
O
U
T
AG
ND
AV
DD
AV
DD
AG
ND
HP JACK
DETECTION
REGULATOR
INPUT
MIXERS
ALC
MICROPHONE
BIAS
PLL
LINN
LINP
LAUX
JACKDET/MICIN
RINP
RINN
RAUX
LHP
LOUTN
LOUTP
ADAU1961
RHP
MONOOUT
ROUTP
ROUTN
MICBIAS
OUTPUT
MIXERS
DAC
ADC
DIGITAL
FILTERS
DAC
DIGITAL
FILTERS
ADC
DAC
ADC
I
2
C/SPI
CONTROL PORT
SERIAL DATA
INPUT/OUTPUT PORTS
K
SDA/
COUT
MCLK ADC_SDATA
BCL
SCL/
CCLK
ADDR1/
CDATA
ADDR0/
CLATCH
LR
C
L
DAC_SDATA
K
0
89
15
-0
01
Figure 1.
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