National Instruments 6711, Руководство пользователя

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Contents
© National Instruments Corporation vii 6711/6713/6715 User Manual
Appendix C
Technical Support Resources
Glossary
Index
Figures
Figure 1-1. The Relationship Between the Programming Environment,
NI-DAQ, and Your Hardware ...............................................................1-6
Figure 3-1. 6711/6713 Block Diagram ....................................................................3-2
Figure 3-2. 6715 Block Diagram .............................................................................3-3
Figure 3-3. UPDATE* Signal Routing ....................................................................3-5
Figure 3-4. RTSI Bus Signal Connection ................................................................3-7
Figure 4-1. 68-Pin I/O Connector Pin Assignment for the 671X Device.................4-2
Figure 4-2. 50-Pin I/O Connector Pin Assignment for the 671X Device
When Using the SH68-50 Cable ...........................................................4-3
Figure 4-3. Analog Output Connections ..................................................................4-9
Figure 4-4. Digital I/O Connections.........................................................................4-10
Figure 4-5. Timing I/O Connections ........................................................................4-12
Figure 4-6. WFTRIG Input Signal Timing ..............................................................4-14
Figure 4-7. WFTRIG Output Signal Timing............................................................4-15
Figure 4-8. UPDATE* Input Signal Timing............................................................4-15
Figure 4-9. UPDATE* Output Signal Timing .........................................................4-16
Figure 4-10. UISOURCE Signal Timing ...................................................................4-16
Figure 4-11. GPCTR0_SOURCE Signal Timing ......................................................4-17
Figure 4-12. GPCTR0_GATE Signal Timing in Edge-Detection Mode ...................4-18
Figure 4-13. GPCTR0_OUT Signal Timing ..............................................................4-19
Figure 4-14. GPCTR1_SOURCE Signal Timing ......................................................4-20
Figure 4-15. GPCTR1_GATE Signal Timing in Edge-Detection Mode ...................4-21
Figure 4-16. GPCTR1_OUT Signal Timing ..............................................................4-21
Figure 4-17. GPCTR Timing Summary.....................................................................4-22
Tables
Table 1-1. PXI-6711/6713 J2 Pin Assignment .......................................................1-3
Table 4-1. Signal Descriptions for I/O Connector Pins ..........................................4-4
Table 4-2. I/O Signal Summary for the 6711/6713 Device ....................................4-6
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