![Motorola MVME5500 Скачать руководство пользователя страница 57](http://html.mh-extra.com/html/motorola/mvme5500/mvme5500_installation-and-use-manual_245422057.webp)
VME Settings
http://www.motorola.com/computer/literature
3-15
3
❏
VMEbus Register Access Image Base Address Register =
00000000
The contents of the VRAI_BS register are not applicable since the
image is disabled.
❏
PCI Miscellaneous Register = 10000000
The LMISC register is set for Universe
I
compatibility and the
coupled window timer is disabled.
❏
Special PCI Slave Image Register = 00000000
The SLSI register is disabled.
❏
Master Control Register = 00C00000
The MAST_CTL register is set to retry forever before the PCI
master signals error, transfer 128 bytes on posted writes before
release, use VMEbus request level 3, request mode = Demand,
Release When Done, align PCI transfers on 32 bytes, and use PCI
bus 0.
❏
Miscellaneous Control Register = 52040000
Sets MISC_CTL register to utilize 256 second VMEbus timeout,
round robin arbitration, 256 second arbitration timeout, do not use
BI-mode and assertion of VIRQ1 is to be ignored.
❏
User AM Codes = 40400000
Sets USER_AM to indicate a user AM code of 0.
The resulting map is therefore:
PCI addresses 0x91000000 - 0xB0000000: VMEbus A32/D32 space,
addresses 0x01000000 - 0x2000000.
PCI addresses 0xB0000000 - 0xB1000000: VMEbus A24/D16 space,
addresses 0xF0000000 - 0xF1000000.
PCI addresses 0xB3FF0000 - 0xB4000000: VMEbus A16/D16 space,
addresses 0xFFFF0000 - 0xFFFFFFFF.
VMEbus A32/D32 addresses from 0x00000000 to (local DRAM size)
address the local memory of the MVME5500.