Motorola MVME162P-242, Инструкция по установке и эксплуатации

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162Bug Firmware
3
Memory Requirements
The program portion of 162Bug is approximately 512KB of code,
consisting of download, debugger, and diagnostic packages and contained
entirely in Flash memory or EPROM.
The 162Bug firmware executes from address $FF800000 whether in Flash
or EPROM. If you set switch S4 segment 5 to
ON
, the address spaces of the
Flash and EPROM are swapped. For MVME162P-242 series boards
(MVME162P2), the factory ship configuration except in the no-VMEbus
case has switch S4 segment 5 set to
OFF
(162Bug operating out of Flash).
The 162Bug initial stack completely changes 8KB of SRAM memory at
addresses $FFE0C000 through $FFE0DFFF, at power-up or reset.
.
The synchronous DRAM can be modeled as ECC or parity type, as
indicated above.
The 162Bug requires 2KB of NVRAM for storage of board configuration,
communication, and booting parameters. This storage area begins at
$FFFC16F8 and ends at $FFFC1EF7.
162Bug requires a minimum of 64KB of contiguous read/write memory to
operate. The ENV command controls where this block of memory is
located. Regardless of where the onboard RAM is located, the first 64KB
is used for 162Bug stack and static variable space and the rest is reserved
as user space. Whenever the MVME162P2 is reset, the target PC is
initialized to the address corresponding to the beginning of the user space,
and the target stack pointers are initialized to addresses within the user
space, with the target Interrupt Stack Pointer (ISP) set to the top of the user
space.
Table 3-1. Memory Offsets with 162Bug
Type of Memory Present Default DRAM
Base Address
Default SRAM
Base Address
4/8/16/32MB synchronous DRAM (SDRAM). Appears
as parity memory at 1/8/16MB, ECC at 32MB. $00000000 $FFE00000
(onboard SRAM)