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Auxiliary I/O Board
6
68P81096E53-C
09/30/05
When data is routed from auxiliary equipment through the Auxiliary I/O
Board to the SCM, it is stored in an SPI Input Buffer. At this time, an option
interrupt request (OPT_IRQ) is generated and sent to the SCM, indicating
that data is available to be read. (During Reset and Initialization the IRQ
is not sent to the SCM.) These inputs are then interrogated by the SCM
applying OP1/2_CS (Option Board 1 or 2 Chip Select), SPI_Clock and se-
rially reading via MISO (Master In / Slave Out). The IRQ also triggers the
Latch Clock of the Input Buffers and sets the Comparator to the new sta-
tus. The Comparators monitor old and new GPI status.
The minimum time within which GPI changes can be detected is 40 msec
and the slowest slope that the signal can be is 1V/sec.
Table 2 provides a description of the SPI Bus input circuitry signals.
Table 3 provides a description of input circuitry for the Option Interrupt
Request signal.
Note 1:
OP1/2 represent two different signals routed to either:
-
Option Slot 1 (P1/B11): that is, signal OP1_CS1,
or
-
Option Slot 2 (which is also P1/B11): that is, signal OP2_CS1.
Note 2:
All signals are 5V TTL signals.
Table 2. SPI Bus Input Circuitry Signals
Signal
Name
Function
Auxiliary I/O
Board
Connector P1
Description
Signal
Direction
MISO
Master In/ Slave Out
Pin B8
serial SPI Latch Data
Output
SPI _CLK
SPI Bit Clock
Pin C8
A low to high transition shifts serial
data bit out of the shift register
Input
OP1/2_CS1
(see Note 1)
SPI Select Line
Pin B11
A high to low transition activates the se-
rial shift mode
Input
Table 3. Option Interrupt Request Signal
Signal
Name
Function
Auxiliary I/O
Board
Connector P1
Description
(see Note 2)
Signal
Direction
Opt_IRQ*
Interrupt when Status
Change at GPI XX
(active low)
Pin A25
Negative pulse with 350uS duration
30 mS delay after GPI Status change
Output
Note
Содержание MTR2000 T5544
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