Motorola MC9S12A256, Руководство пользователя

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MC9S12DT256 Device User Guide — V03.07
125
Table A-21 Expanded Bus Timing Characteristics
Conditions are shown in Table A-4 unless otherwise noted, C
LOAD
= 50pF
Num C Rating Symbol Min Typ Max Unit
1 P Frequency of operation (E-clock)
f
o
0 25.0 MHz
2 P Cycle time
t
cyc
40 ns
3 D Pulse width, E low
PW
EL
19 ns
4 D Pulse width, E high
1
PW
EH
19 ns
5 D Address delay time
t
AD
8 ns
6 D Address valid time to E rise (PW
EL
–t
AD
) t
AV
11 ns
7 D Muxed address hold time
t
MAH
2 ns
8 D Address hold to data valid
t
AHDS
7 ns
9 D Data hold to address
t
DHA
2 ns
10 D Read data setup time
t
DSR
13 ns
11 D Read data hold time
t
DHR
0 ns
12 D Write data delay time
t
DDW
7 ns
13 D Write data hold time
t
DHW
2 ns
14 D Write data setup time
1
(PW
EH
–t
DDW
)
t
DSW
12 ns
15 D Address access time
1
(t
cyc
–t
AD
–t
DSR
)
t
ACCA
19 ns
16 D E high access time
1
(PW
EH
–t
DSR
)
t
ACCE
6 ns
17 D Non-multiplexed address delay time
t
NAD
6 ns
18 D Non-muxed address valid to E rise (PW
EL
–t
NAD
) t
NAV
15 ns
19 D Non-multiplexed address hold time
t
NAH
2 ns
20 D Chip select delay time
t
CSD
16 ns
21 D Chip select access time
1
(t
cyc
–t
CSD
–t
DSR
)
t
ACCS
11 ns
22 D Chip select hold time
t
CSH
2 ns
23 D Chip select negated time
t
CSN
8 ns
24 D Read/write delay time
t
RWD
7 ns
25 D Read/write valid time to E rise (PW
EL
–t
RWD
) t
RWV
14 ns
26 D Read/write hold time
t
RWH
2 ns
27 D Low strobe delay time
t
LSD
7 ns
28 D Low strobe valid time to E rise (PW
EL
–t
LSD
) t
LSV
14 ns
29 D Low strobe hold time
t
LSH
2 ns
30 D NOACC strobe delay time
t
NOD
7 ns
31 D NOACC valid time to E rise (PW
EL
–t
NOD
) t
NOV
14 ns