SON
G
PRODUCER
T
EST
I
ADJUSTMENT ITROUBLESHOOT
I
NG
I
n
cluded
on
the
master
diskette
is
a
c
om
plete
menu-driven
program
for
testing
th
e
Song
Producer
hardware
module
.
All
th
at is needed
to run the test program
are
~w
o
standard
"guitar"
cables,
one
MIDI
c
able and a footswitch
.
(Guitar
cables
may
b
e used
to simulate
the footswitch.)
To
access
the
test
program,
insert
the
S
O
ng Producer
disk
and type
the following,
W
h
en
the
program
finishes
loading
.
the
co
m
puter
will proMPt
"READY"
.
N
ext
.
type
RUN
(RETURN)
and
follow
the
enu-driven
instructions
displayed
on
the
screen
.
IF THE TEST PROGRAM
RUNS SUCCESSFULLY
.
IT
V
ERIFIES
PROPER
OPERATION
OF
THE
SONG
P
R
O
DUCER
HARDWARE.
Therefore
,
any problems
encountered
are probably
related
to
user
e
rror
and
the associated
portion
of
the
o
wn
er's
manual
should
be reread
carefully.
If
calibration
becomes
necessary
the
program
will
prompt
the
necessary
a
d
justments.
Use a
1/8"
(3 mm)
flat blade
screwdriver
for the
only
two Song Producer
a
djustments
-
CLOCK
PULSE
WIDTH
and
DRUM
P
U
LSE WI DTH •
I
f troubleshooting
becomes
necessary,
the
program
will
proMPt
appropriately
.
The
co
v
er
must
then
be removed
using
a
#1
P
h
illips
screwdriver
and
a
1/4"
phone
p
lug-to-test
probe
cable used
to complete
th
e
procedure.
Tr
o
ubleshooting
is
best
l
eft
to
qualified
service
personnel.
P
l
ease
consult
the
authorized
service
center
list
o
r
factory
service
department
for assistance
.
li
f
-
G
~=
-
::-::
1L
it
!)
0J
~
!
':
-
-
-
-C~=
=
n
"
0
I '
-
"
.
:
.
.
J
.
-~-~
~
TES
T P
ROBE CABL
E
SONG PRODUCER
C
I
RCU
I
T D
E
SCR
I
PT
I
ON
THE
SONG
P
R
ODUCER
CONSISTS
HARDWARE
CIRCUITS
:
1. The Da
t
a
and Address
Bus Buffer
2
.
Address
Decoder
3
.
Control
Latch
Driver
4
.
Drum Output
Circuit
5. Clock
In and Clock
In
Disable
Circuit
6. Clock
Out and Clock
OUt Disable
Circuit
7. Fo
o
tswitch
Inputs
NOTE
:
ALL
ADDRESSES
ARE
IN HEX AND ARE
FOLLO
W
ED
PARENTHETICALLY
B
Y
THEIR
DECIMAL
EQUIVALENT.
8
.
MIDI
Input
and Output
Circuits
9
.
Interrupt
Disable
Circuit
The bus buffers
consist
of U8 and
U9.
U8
is
a
bi-directional
bus
transceiver
connected
to
the
data
bus
to
buffer
outgoing
and incoming
data signals
to and
from the
Commodore
64. The enable
and data
direction
on
U8
is controlled
from
the
1/01
line
and
the
R/W
line
from
the
Commodore
6
4
.
The
1/01
line
sets
the
memory
map boundaries
to
DEOO
(
56832)
to
DEFF
(5708
7
).
U9 buffers
t
h
e 1/01
line and
R/WQ
line,
the
~
2
clock
and
the
first
three address
lines
from t
h
e Commodore
64.
The
address
decoder
consists
of UII and U3
and decodes
addresses
in the
range of DEOO
(56832)
to DEOF
(568
4
7).
UII se
l
ects
one
of eight
lines
by
pulling
that
line low.
Since
the least significant
address
bit
is
AI
,
UII decode
s
e
v
er
y
second
address
.
For
example,
DEOO
w
ill
stay
low for both
DEOO
(56832)
and DEO
I
(5683
3
)
.
U3 inhibits
any
address
decoding
above
DEOF
(568
4
8)
.
The
decoded
address
for
each
one
of
the
subsections
may be found on the schematic.
The
Co
n
trol
Latch
Dri
v
er
consists
of
U7
and
U2B
a
n
d
is
memory
mapped
a
t
DEOA
(56842). A
me
m
o
r
y
w
r
i
te
to
th
i
s address
causes
a logic
"1
"
to
appear
at U7
Pin 3
.
T
his signal
is
"
NANDED"
by U2B to provide
a
control
latch
clock which
results
in
data
bus
transfer
to
the
appropriate
latches
on
the
falling
edge
of
the
~
2
clock.
DO
=
Clock
Disa
b
le
Output
(U4B)
"0"
=
Dis able
Clock
Disable
Inp
u
t
(USB)
"
1"
=
Disable
Interrupt
Disable
(USA)
"0"
=
Disable
Drum Trigger
Pulse
/
Latch
Selec
t
"
0"
=
Latch
.
"
1
"
=
Pulse
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