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MELSEC-Q
3 SPECIFICATIONS
(5) Communication trouble area (Buffer memory address: 2040 (7F8
H
)
to 2079 (81F
H
))
When some kind of trouble occurs during communication the QJ71PB92D stores
the contents of the trouble in this area. Fixed type or ring type can be selected for
this area by turning the communication trouble area type selection (Y03) on or off
(refer to Section 3.3.2 (11)).
As shown in the following diagram, a total of 8 pieces of trouble information that
consist of the trouble code, detailed data length, and detailed data can be stored
in the basic configuration regardless of whether for fixed or ring data.
Ring type data is stored in order from the header with the header always being
the latest trouble information.
With fixed type data, when 8 pieces of trouble information are stored the areas 2
to 8 (data 1 to 7) are fixed, so when the next new trouble occurs only header area
1 (data 8) is updated.
All trouble information for either type can be cleared by turning on the
communication trouble detection signal reset (X01). When communication
trouble detection signal reset (Y01) is on, the contents of the communication
trouble area are hold though the communication trouble detection signal (X01)
turns off.
The communication trouble area configuration is as follows.
(a) Communication trouble area configuration
2040(7F8
H
)
2044(7FC
H
)
2045(7FD
H
)
2049(801
H
)
2050(802
H
)
2054(806
H
)
2075(81B
H
)
2079(81F
H
)
Trouble information area 1
Trouble information area 2
Trouble information area 3
Trouble information area 8
2040(7F8
H
)
2041(7F9
H
)
2042(7FA
H
)
2043(7FB
H
)
2044(7FC
H
)
Error code (refer to the next page.)
Detailed data length (0 to 3)
Detailed data 1
Detailed data 2
Detailed data 3
Data 1
Ri
ng t
y
pe
Fi
x
e
d
t
y
pe
Trouble
information area 1
Trouble
information area 2
Trouble
information area 1
Trouble
information area 2
Trouble
information area 8
Trouble
information area 8
Data 2
Data 9
Data 8
Data 1
Data 2
Data 1
Data 1
Data 7
Data 1
Data 8
Data 7
Data 1
Data 8
Data 2
Data 9
Data 7
Data 1
Buffer memory
address demical
(Hexadecimal)
Buffer memory
address demical
(Hexadecimal)
