MiTAC MiNote 7321, Руководство по обслуживанию

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7321 N/B Maintenance 7321 N/B Maintenance
5.3 VIA VT8231 BGA PCI-LPC/ISA South Bridge
Power Management and External State Monitoring
Signal Name PIN # I/O Signal Description
SUSB# /
GPO2
P2 O / O Suspend Plane B Control (Function 4 Rx54[3]=0). Asserted during
power management STR and STD suspend states. Used to control the
secondary power plane. (10K PU to VCCS if not used)
SUSC#
/ GPO N3 O / O
Suspend Plane C Control.
Asserted during power management STD
suspend state. Used to control the tertiary power plane. Also
connected to ATX power-on circuitry.
SUSST1# /
GPO3
N5 O / O Suspend Status 1 (Function 4 Rx54[4] = 0). Typically connected to
the North Bridge to provide information on host clock status.
Asserted when the system may stop the host clock, such as Stop
Clock or during POS, STR, or STD suspend states. Connect 10K PU
to VCCS.
SUSCLK
GPO4
W2 O / O Suspend Clock (Function 4 Rx55[1]=0). 32.768 KHz output clock
for use by the North Bridge (e.g., Apollo MVP3 or MVP4) for
DRAM refresh purposes. Stopped during Suspend-to-Disk and
Soft-Off modes. Connect 10K PU to VCCS.
Resets, Clocks, and Clock Control
Signal Name PIN # I/O Signal Description
PWRGD
E2 I
Power Good.
Connected to the PWRGOOD signal on the Power
Supply.
PWRBTN# U2 I Power Button. Used by the Power Management subsystem to monitor
an external system on/off button or switch. The VT8231 performs a
200us debounce of this input if Function 4 Rx40[5] is set to 1. (3.3V
only)
SLPBTN# /
FAN2/
GPIO18
K3 I
/ I
/ IO
Sleep Button (Function 4 Rx40[6] = 1). Used by the power
management subsystem to monitor an external system sleep button or
switch. Connect to VCC if not used.
PCIRST# E4 O PCI Reset. Active low reset signal for the PCI bus. The VT8231 will
assert this pin during power-up or from the control register.
RTCX1 E3 I RTC Crystal Input : 32.768 KHz crystal or oscillator input. This input
is used for the internal RTC and for power-well power management
logic.
RTCX2 F5 O RTC Crystal Output : 32.768 KHz crystal output
OSC T12 I Oscillator. 14.31818 MHz clock signal used by the internal Timer.
SLOWCLK /
GPO0
R4 O Slow Clock. Frequency selectable if PMU function 4 Rx54[1-0] is
nonzero (set to 01, 10, or 11).
CPUSTP# /
GPO5
P4 O /
O
CPU Clock Stop (Function 4 RxE4[0] = 0). Signals the system clock
generator to disable the CPU clock outputs. Not connected if not used.
See also PMU I/O Rx2C[3].
PCISTP# /
GPO6
T4 O /
O
PCI Clock Stop (Function 4 RxE4[1] = 0). Signals the system clock
generator to disable the PCI clock outputs. Not connected if not used.
5. Pin Descriptions of Major Components