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8-4. DIFFERENTIAL COUNTER function
(1) Differential Count Function
a. The DIFFERENTIAL COUNTER offers counting of deviation between output pulse from the MCC05v2 and external
input clock, or counting of external clock alone.
b. Count data can be read from the DRIVE DATA1, 2 and 3 PORTs any time as needed (as long as the DFL COUNTER
PORT is selected).
Data guarantee range is pulse area of +8,388,607 to -8,388,607.
c. The counter value is reset to 0 at POWER ON/RESET.
Using the DFL COUNTER PRESET Command of the COUNTER Commands allows you to set optional value on
the counter.
d. Any one of 90゚phase difference signal and respectively independent CW or CCW clock may be used as external
clock.
For selecting type of external input clock and also for selecting its multiplication factor, the
DFL COUNTER INITIALIZE command is used.
At POWER ON/RESET, a single multiplication of 90゚phase difference signal is selected and the counter
functions as the differential counter.
(2) Differential Count Compare Function
a. The DIFFERENTIAL COUNTER is connected to two COMPARE REGISTERs and COMPARATORs.
Its counting (in absolute
value) is constantly compared against the value set on these two registers (these registers are different
from COMPARE REGISTERs on the PULSE COUNTER).
The COMPARATOR1 is constantly available for detection of the "count in absolute value≧REGISTER1"
(excessive deviation) and the COMPARATOR2 is used for detecting the "count in absolute value≦REGISTER2"
(positioning complete).
+
REGISTER1
REGISTER2
Deviation counted
t
REGISTER2
REGISTER1
-
COMPARATOR1
COMPARATOR2
b. Each of above detection is implemented by the STATUS signal or interrupt request signal. You can select
the through mode (detection by the comparator is output as it is) or the latch mode (holds the detection)
for both the STATUS signal and the interrupt request signal.
In the latch mode, you can reset the STATUS signal or interrupt request signal by reading the STATUS3 PORT.
And, you can select a mode that enables the reset or another mode that disables it even when the condition
(COUNTER≧REGISTER1 or COUNTER≦REGISTER2).
For details, refer to 8-5.
The interrupt request signal (XDFLINT) is output from two comparators. You can enable or disable the
output on individual comparator basis.
c. The pulse output can also be stopped by the COUNTER≧REGISTER1 or COUNTER≦REGISTER2.
You can specify the immediate output stop or gradual stop through deceleration.
The immediate stop sets the FSEND BIT to 1 and the SSEND BIT is set to 1 when the gradual stop is
specified.
d. The DFL COUNTER INITIALIZE command is used for controlling the DFL COUNT COMPARE function.
Data for the COMPARE REGISTER is set on the COUNTER PORT. The COUNTER PORT is independent from the DRIVE
PORT, thus rewriting of the compare data is available any time.
Содержание C-875
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