AN_6612_007
78M6612 Hardware Design Guidelines
Rev 2
21
XIN
XOUT
C1
C2
32.768 kHz
R1
V3P3
Y1
Figure 23: Crystal Oscillator with Pull-up to Reduce Startup Time
v
C1
Y1
U1
V3P3 PLANE / TOP LAYER
MULTIPLE VIAS TO GND PLANE
(BOTTOM LAYER)
MULTIPLE VIAS TO GND PLANE
(BOTTOM LAYER)
C2
R1
Y1
GNDA
GNDD
Figure 24: Example of Layout of Crystal Oscillator with Pull-up Resistor
6.3.5 Temperature and Voltage Issues
The crystal oscillator should be tested over the entire temperature and voltage range in which it is
expected to operate. The most critical corner is at the highest temperature and lowest supply voltage.
This condition leads to minimum loop gain and could result in a slow or no start-up.
To minimize undesirable temperature effects, use capacitors with a low temperature coefficient, such as
NP0 or COG types. Verify that all components are specified to work for the entire temperature and
voltage range, the crystal in particular.
6.3.6 Use with External Canned Oscillators
The 78M6612 oscillator may be driven from an external 32.768 kHz clock source. The clock source can
be derived from a canned oscillator or a divided down system clock. The external clock signal must be
attenuated using the resistor divided shown in Figure 25.
