Maxim Integrated 78M6612, Руководство по проектированию аппаратного обеспечения

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AN_6612_007 78M6612 Hardware Design Guidelines
Rev 2 23
7 Hardware Design Checklist
Verified Item Notes
Non-isolated Configuration 3.3 VDC supply rail (V3P3) for the 78M6612 must
be directly connected to AC-Neutral.
Non-isolated Configuration Isolation components, if required, are added in
between the measurement IC and the rest of the
system.
Safety Precautions External test equipment must be floated from
earth ground to avoid equipment damage.
Safety Precautions AC outlets must be properly wired.
Crystal Capacitor’s Value Capacitance value is 27 pF for 32.768 kHz crystal.
No resistor across XTAL.
Shunt Value Calculate value based on maximum load current.
Not to exceed
±
250 mVpp.
Shunt Power Rating Optimize shunt value at maximum load current for
required power dissipation.
Line Voltage Resistor Divider Selection Calculate value based on maximum input LINE
voltage. Not to exceed
±
250 mVpp.
Line Voltage Divider Resistor Rating Select package based on its maximum voltage
rating and isolation clearance requirements.
CT Turns Ratio and Power Rating Select configuration based on maximum load
current.
CT Burden Resistor Value Calculation Calculate value based on maximum load current
and CT turns ratio. Not to exceed
±
250 mVpp.
V3P3 Decoupling Capacitor Value and
Placement 1000 pF and 0.1 µF ceramic capacitors placed as
close as possible to the 78M6612 V3P3A pin. Add
a 22 µF bulk capacitor.
V1 Pin Calculate for V1 pin voltage to be between 1.6 V
and 2.9 V for normal operation.
Reset Circuitry Active high. Connect to GND or pull low.
In Circuit Emulator (ICE) Pins Connect ICE_EN pin to GND or pull low.
Driving External Loads Connect external loads to the DIO pins.
Connecting I2C EEPROMs
Connect I
2
C EEPROMS or
µ
Wire EEPROMS to
DIO pins.
UART0 (TX/RX)
Attach a 10 k
Ω
pull-down resistor to the RX pin.
Include a 100 pF ceramic capacitor for EMI
protection.
Power Supply Topologies Select a source of V3P3 power.