MODEL 2350-1 Data Logger
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3. THEORY OF OPERATION
farad capacitor through CR113. CR113 prevents
C129 from discharging through the +BATUNSR
line when the batteries are removed.
3.2.5 CLOCK CHIP
U119 provides the time and date
information used in conjunction with the logged
data. U119 is crystal controlled by Y158 and
supporting components C102 and C103 at
32.786 kHz. The 10 Hz output at pin 13 of U119,
provides the timing frequency to the µP.
3.2.6 AUDIO CIRCUIT
Pulses are coupled from the AMP/PS
board to U128 — RDD 104 decade divider chip.
AUDIO DIVIDE (front panel) by “1" switch position
jumpers the PULSE’ input directly to the CLICK’
input to the timers. Divide by “10" and “100" switch
positions connect the DIV OUT of U128 to the
CLICK’ input using U128 for pulse division. U118,
a dual package 7555 timer, provides audio
oscillation. Pulses (CLICK’) are coupled to the first
timer, pins 1-6 of U118, via C97. This timer is
configured as a monostable multivibrator (one-
shot) producing a fixed pulse-width for each input
pulse at pin 6 of U118. Pulse-width is set by R161
and C95. CR114 limits pulse input to pin 6 of U118
to 5.6 volts; R134 is a pull-up resistor for the AC
coupled pulse. The second half of U118 is
configured as a astable (free-running) multivibrator
which produces the audible tone — frequency is
set by R133 and C96.
T157 provides amplification of the audio
signal driving the unimorph speaker. Audio
volume is varied by adjusting the voltage on top of
the primary winding of T157 via the front panel
volume control. When an ALARM’ is initiated
maximum voltage applied by saturating Q154.
3.3 I/O INTERFACE BOARD #5371-063
3.3.1 MICROPROCESSOR (µP)
U15, Intel 80C51FA, communicates and
processes information bi-directionally from/to the
RS-232 interface (U13) to/from the central
processor via the serial interface lines XMIT,
READY, RECEIVE, and CLEAR SEND. U15 also
decodes information from the bar code reader
(WAND) and sends information to central
processor. The µP clock frequency is crystal
controlled by Y159 and related components at
6.144 MHZ.
U14, EPROM, stores the program for the
I/O µP. U14 incorporates on-board latches to
separate the multiplexed address and data buss
lines.
CR26-CR28 provide “clipping” of transients
which may be produced at the SERIAL I/O port.
3.3.2 RS-232 INTERFACE
U13, MAX232, is a +5 Vdc powered RS-
232 driver/ receiver used to interface the Model
2350-1 to a computer or keypad terminal. U13
incorporates on-board voltage multipliers which
generate the +10 and -10 volts required for RS-
232 communication.
3.3.3 BACKLIGHT DRIVE
The LCD backlight is illuminated by
appling power to +EL POWER when front panel
BACKLIGHT switch is ON. With battery voltage
applied to +EL POWER, blocking oscillator —
Q23, T1 and supporting components begin
oscillating. The signal is amplified by T1 to provide
a 70VAC signal to drive the LCD backlight. R30,
a 10 ohm resistor, limits the power-up surge to the
oscillator circuit.
Содержание 2350-1
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