PCI Configuration Registers
4-9
Registers: 0x10–0x13
Base Address Register Zero (I/O)
Read/Write
BAR0
Base Address Register Zero - I/O
[31:0]
This base address register is used to map the operating
register set into I/O space. The LSI53C896 requires
256 bytes of I/O space for this base address register. It
has bit zero hardwired to one. Bit 1 is reserved and
returns a zero on all reads, and the other bits are used
to map the device into I/O space. For detailed information
on the operation of this register, refer to the PCI 2.1
specification.
Registers: 0x14–0x1B
Base Address Register One (MEMORY)
Read/Write
BAR1
Base Address Register One
[63:0]
This base address register maps SCSI operating
registers into memory space. This device requires
1024 bytes of address space for this base register. This
register has bits [9:0] hardwired to 0b0000000100. The
default value of this register is 0x0000000000000004. For
detailed information on the operation of this register, refer
to the PCI 2.1 specification.
31
0
BAR0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
63
32
BAR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
31
0
BAR1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
*
Содержание LSI53C896
Страница 6: ...vi Preface...
Страница 16: ...xvi Contents...
Страница 88: ...2 62 Functional Description...
Страница 112: ...3 24 Signal Descriptions...
Страница 306: ...6 38 Specifications This page intentionally left blank...
Страница 310: ...6 42 Specifications This page intentionally left blank...
Страница 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Страница 340: ...6 72 Specifications...
Страница 346: ...A 6 Register Summary...
Страница 362: ...IX 12 Index...