LT8708-1
7
Rev 0
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
NMOS Gate Drivers
TG1, TG2 Rise Time
C
LOAD
= 3300pF (Note 4)
20
ns
TG1, TG2 Fall Time
C
LOAD
= 3300pF (Note 4)
20
ns
BG1, BG2 Rise Time
C
LOAD
= 3300pF (Note 4)
20
ns
BG1, BG2 Fall Time
C
LOAD
= 3300pF (Note 4)
20
ns
TG1 Off to BG1 On Delay
C
LOAD
= 3300pF Each Driver
90
ns
BG1 Off to TG1 On Delay
C
LOAD
= 3300pF Each Driver
80
ns
TG2 Off to BG2 On Delay
C
LOAD
= 3300pF Each Driver
90
ns
BG2 Off to TG2 On Delay
C
LOAD
= 3300pF Each Driver
80
ns
Min On-Time for Main Switch in Boost Operation (t
ON(M3,MIN)
)
Switch M3, C
LOAD
= 3300pF
200
ns
Min On-Time for Synchronous Switch in Buck Operation (t
ON(M2,MIN)
) Switch M2, C
LOAD
= 3300pF
200
ns
Min Off-Time for Main Switch in Steady-State Boost Operation
Switch M3, C
LOAD
= 3300pF
230
ns
Min Off-Time for Synchronous Switch in Steady-State Buck Operation Switch M2, C
LOAD
= 3300pF
230
ns
Oscillator
Switch Frequency Range
SYNCing or Free Running
100
400
kHz
Switching Frequency, f
OSC
R
T
= 365k
R
T
= 215k
R
T
= 124k
l
l
l
102
170
310
120
202
350
142
235
400
kHz
kHz
kHz
SYNC High Level for Synchronization
l
1.3
V
SYNC Low Level for Synchronization
l
0.5
V
SYNC Clock Pulse Duty Cycle
V
SYNC
= 0V to 2V
20
80
%
Recommended Min SYNC Ratio f
SYNC
/f
OSC
3/4
CLKOUT Output Voltage High
V
LDO33
– V
CLKOUT
, 1mA Out of CLKOUT Pin,
I
LDO33
= 0µA
100
250
mV
CLKOUT Output Voltage Low
1mA Into CLKOUT Pin
25
100
mV
CLKOUT Duty Cycle
T
J
= –40°C
T
J
= 25°C
T
J
= 125°C
22.7
44.1
77
%
%
%
CLKOUT Rise Time
C
LOAD
= 200pF
20
ns
CLKOUT Fall Time
C
LOAD
= 200pF
20
ns
CLKOUT Phase Delay
SYNC Rising to CLKOUT Rising, f
OSC
= 100kHz
l
160
180
200 Degree
ELECTRICAL CHARACTERISTICS
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
INCHIP
=12V,
SHDN
= 3V, DIR = 3.3V unless otherwise noted. (Note 3).
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Do not force voltage on the V
C
pin.
Note 3: The LT8708E-1 is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
The LT8708I-1 is guaranteed over the full –40°C to 125°C junction
temperature range. The LT8708H-1 is guaranteed over the full –40°C to
150°C operating junction temperature range.
Note 4: Rise and fall times are measured using 10% and 90% levels.
Delay times are measured using 50% levels.
Note 5: Do not apply a voltage or current source to these pins. They must be
connected to capacitive loads only, otherwise permanent damage may occur.
Note 6: Negative voltages on the SW1 and SW2 pins are limited, in an
application, by the body diodes of the external NMOS devices, M2 and
M3, or parallel Schottky diodes when present. The SW1 and SW2 pins
are tolerant of these negative voltages in excess of one diode drop below
ground, guaranteed by design.
Note 7: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability.
Note 8: Do not force voltage or current into these pins.
