LT8708-1
20
Rev 0
For more information
A 1* to 3* indicates that the error amplifier listed for that
row is disabled under that column’s condition. The pur-
poses of disabling the respective amplifiers are:
1* This improves transient response when VOUTLOMON
de-asserts.
2* This improves transient response when VINHIMON
de-asserts.
3* Since power can only transfer from V
OUT
to V
IN
, this
prevents higher FBOUT/V
OUT
voltages from interfer-
ing with the FBIN/V
IN
voltage regulation.
The primary regulation loop for the LT8708-1 involves EA6,
which regulates the average I
OUT(SLAVE)
based on the ICP
and ICN input voltages. Therefore, the IMON_OP pin must
always have a proper compensation network connected.
See the Loop Compensation section for more information.
The remaining error amplifiers can be disabled or used to
limit their respective voltages or currents. When unused,
the respective input pin(s) should be driven so that they
do not interfere with the operation of the remaining ampli-
fiers. Use Table 6 as a guide.
Table 6. Disabling Unused Amplifiers
AMPLIFIER
NAME
PIN NAME
TIE TO
DISABLE
EXAMPLE DISABLED
PIN CONNECTION
EA1
IMON_INN
< 0.9V
GND
EA3
FBIN
> 1.5V
LDO33
EA4
FBOUT
< 0.9V
GND
EA5
IMON_INP
TRANSFER FUNCTION: I
OUT(SLAVE)
VS I
OUT(MASTER)
The LT8708-1 regulates I
OUT(SLAVE)
proportionally to
I
OUT(MASTER)
following the transfer functions
1
shown in
Figure 5 and Figure 6. The currents are measured (sensed)
by the differential CSPOUT–CSNOUT pin voltages for each
phase and the information is sent from the master to the
slaves via the ICP and ICN pins. The transfer functions
are represented by the slave’s current sense voltage
(V
(CSPOUT–CSNOUT)S
) vs the master’s current sense volt-
age (V
(CSPOUT–CSNOUT)M
). To convert the axes of Figure 5
and Figure 6 to I
OUT(SLAVE)
vs I
OUT(MASTER)
, simply divide
1. The ICP and ICN pins must be connected between the master and slave
chips. 17.4k resistors and appropriate parallel capacitors are also required
from those pins to ground.
V
(CSPOUT–CSNOUT)S
and V
(CSPOUT–CSNOUT)M
by the slave’s
and master’s R
SENSE2
values, respectively.
Figure 5 shows that increasing the master’s average
current sense voltage V
(CSPOUT–CSNOUT)M
above ±60mV
results in no additional current from the slave LT8708-1.
As such, the average of V
(CSPOUT–CSNOUT)M
should be
limited to ±50mV by connecting appropriate resistors
from the IMON_OP and IMON_ON pins of the LT8708
to ground (see the I
IN
and I
OUT
Current Monitoring and
Limiting section of the LT8708 data sheet).
OPERATION
Figure 5. Typical V
(CSPOUT–CSNOUT)S
vs
V
(CSPOUT–CSNOUT)M
in CCM
1
Figure 6. Typical V
(CSPOUT–CSNOUT)S
vs V
(CSPOUT–CSNOUT)M
in FDCM, FHCM and Burst Mode Operation
1
V
(CSPOUT–CSNOUT)M
(mV)
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
V
(CSPOUT–CSNOUT)S
(mV)
87081 F06
V
(CSPOUT–CSNOUT)M
(mV)
–80 –60 –40 –20
0
20
40
60
80
–80
–60
–40
–20
0
20
40
60
80
V
(CSPOUT–CSNOUT)S
(mV)
87081 F05
