LT8708-1
29
Rev 0
approach that is used for compensating the LT8708’s
input current regulation loops.
3. Complete the multiphase system with the LT8708
and LT8708-1(s). A few nF of capacitance should be
placed on the ICP and ICN pins near the LT8708 for
proper compensation. In addition, adding a few hun-
dred Ohms in series with these capacitors can often
provide extra phase margin to the multiphase system.
See Figure 2 as an example.
4. Perform the loop stability analysis in simulation and/
or on the bench. Primarily, adjust the LT8708’s V
C
compensation network for stability. A trim pot and
selectable capacitor bank can be used on the V
C
pin
to determine the optimal values. Typically, the LT8708
should be adjusted to have lower bandwidth than the
LT8708-1 phases. This can be achieved by increasing
the capacitance and/or reducing the series resistance
of the LT8708’s V
C
compensation network.
If the LT8708 operates in constant current limit, as
set by one or more of the IMON_xx pins, adjust the
respective LT8708 IMON_xx filter capacitors as well
to achieve optimal loop stability.
VOLTAGE LOCKOUTS
The LT8708-1 offers the same voltage detectors as the
LT8708 to make sure the chip is under proper operat-
ing conditions. See the Voltage Lockouts section of the
LT8708 data sheet for more details.
Although allowed with a standalone LT8708, a resistor
divider connected to the SWEN pins should never be
used for undervoltage detection in a multiphase system
(see the Start-Up: SWEN Pin section for proper ways to
connect or drive the SWEN pin in a multiphase system).
Instead, an external comparator chip can be used to mon-
itor undervoltage conditions, and its output drives the
common SWEN node in a multiphase system through a
current limiting resistor.
CIRCUIT BOARD LAYOUT CHECKLIST
The LT8708’s circuit board layout guidelines also apply
to the LT8708-1(s). Refer to the Circuit Board Layout
Checklist section of the LT8708 data sheet for details.
In addition:
• Route the ICP and ICN traces together with mini-
mum PCB trace spacing from the LT8708 to the
LT8708-1(s). Avoid having these traces pass through
noisy areas, such as switch nodes.
• Star connect the V
IN
and V
OUT
power buses as well
as the power GND bus to each LT8708/ LT8708-1(s).
Minimize the voltage difference between local V
IN
,
V
OUT
and power GNDs, respectively.
DESIGN EXAMPLE
In this section, we start with the Design Example in the
LT8708 data sheet, and expand it into a 2-phase regula-
tor. The design requirements from the LT8708 data sheet
are listed below with the total output current (I
OUT
) and
the total input current (I
IN
) specifications doubled for two
phases.
V
IN
= 8V to 25V
V
IN_FBIN
= 12V (V
IN
regulation voltage set by LT8708
FBIN loop)
V
OUT_FBOUT
= 12V (V
OUT
regulation voltage set by
LT8708 FBOUT loop)
I
OUT(MAX, FWD)
= 10A
I
IN(MAX, RVS)
= 6A
f
=150kHz
This design operates in CCM.
Maximum ambient temperature = 60°C
Use the same R
T
, R
SENSE
, R
SENSE2
resistors, induc-
tor, external MOSFETs and capacitors from the Design
Example of the LT8708 data sheet for LT8708-1.
SYNC Pin: Since this is a 2-phase system, the slave chip
operates 180° out of phase from the master chip. Connect
the LT8708’s CLKOUT pin to the LT8708-1’s SYNC pin.
TYPICAL APPLICATIONS
