102
while (Get_SPI_Reg_bits(0x0123, 15, 15) != 1) //wait till COARSE_STEPDONE=1
{
+;
if(try_cnt > MAX_TRY_CNT) return 0;
}
if (Get_SPI_Reg_bits(0x0123, 14, 14) == 1) //check CAORSEPLL_COMPO
{
Modify_SPI_Reg_bits (0x0121, 3 + i, 3 + i, 0); // SWC_VCO<i>=0
}
Modify_SPI_Reg_bits (0x0121, 0, 0, 0); // COARSE_START=0
if(i==0) break;
i--;
}
//Normal mode setting
Modify_SPI_Reg_bits (0x011C, 12, 12, 0); // EN_COARSEPLL=0
Modify_SPI_Reg_bits (0x011C, 9, 9, 0); // EN_INTONLY_SDM=0
Modify_SPI_Reg_bits (0x011C, 14, 14, 0); // SHORT_NOISEFIL=0 SPDUP_VCO_ Short the noise filter resistor to speed up the settling time
return 1;
}
C code for CGEN VCO coarse tuning:
unsigned char VCO_CoarseTuning_CGEN (float Fref_MHz, float Fvco_des_MHz)
{
unsigned short Nround;
unsigned char i, try_cnt;
// Initialization
Modify_SPI_Reg_bits (0x0086, 10, 10, 1); // 1) EN_COARSE_CKLGEN=1, a. VCO control voltage is switched to a DC =VDD/2
Modify_SPI_Reg_bits (0x008B, 0, 0, 0); // 2) COARSE_START_CGEN=0
Modify_SPI_Reg_bits (0x0086, 9, 9, 1); // 3) EN_INTONLY_SDM_CGEN=1
Modify_SPI_Reg_bits (0x0086, 15, 15, 1); // 4) SHORT_NOISEFIL=1 SPDUP_VCO_CGEN Short the noise filter resistor to speed up the settling time
Nround = (unsigned short)(4*Fvco_des_MHz/F0.5); // 5) Nround=round(4*Fvco_des/Fref)
Modify_SPI_Reg_bits (0x0087, 15, 0, 0); // 6) FRAC_SDM_CGEN=0
Modify_SPI_Reg_bits (0x0088, 3, 0, 0);
Modify_SPI_Reg_bits (0x0088, 13, 4, (Nround-4)); // 7) INT_SDM_CGEN =Nround-4
Modify_SPI_Reg_bits (0x008B, 8, 1, 0); // 9)
Set CSW_VCO_CGEN<7:0>=<00000000>
i=7;// 10)
i=7
// Loop Section
while(1)
{
Modify_SPI_Reg_bits (0x008B, 1 + i, 1 + i, 1); // CSW_VCO_CGEN<i>=1
Modify_SPI_Reg_bits (0x008B, 0, 0, 1); // COARSE_START_CGEN=1
while ( Get_SPI_Reg_bits(0x008C, 15, 15) != 1 ) //wait till COARSE_STEPDONE_CGEN=1
{
+;
if(try_cnt > MAX_TRY_CNT) return 0;
}
if ( Get_SPI_Reg_bits(0x008C, 14, 14) == 1) //check COARSEPLL_COMPO_CGEN
{
Modify_SPI_Reg_bits (0x008B, 1 + i, 1 + i, 0); // SWC_VCO<i>=0
}
Modify_SPI_Reg_bits (0x008B, 0, 0, 0); // 2) COARSE_START_CGEN=0
if(i==0) break;
i--;
}
Modify_SPI_Reg_bits (0x0086, 10, 10, 0); // 1) EN_COARSE_CKLGEN=0
Modify_SPI_Reg_bits (0x0086, 9, 9, 0); // 3) EN_INTONLY_SDM_CGEN=0
Modify_SPI_Reg_bits (0x0086, 15, 15, 0); // 4) SHORT_NOISEFIL=0 SPDUP_VCO_CGEN Short the noise filter resistor to speed up the settling time
return 1;
}
A3.2
Main resistor (bias) calibration
Calibration steps:
1.
Set the control signal MUX_BIAS_OUT=1
2.
Sweep from zero to maximum RP_CALIB_BIAS; in each step:
Содержание LMS7002M Series
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