17
2.3
NCO Configuration Memory
The NCO configuration memory control is listed in this chapter. There are 4 NCOs – two for
each transmit and receive MIMO channel.
The carrier frequency
f
c
generated by NCO could be set using the following formula:
clk
c
f
fcw
f
32
2
where
fcw
represents decimal value of the 32-bit frequency control word and
f
clk
is the NCO
clock frequency.
The carrier phase offset can also be adjusted using the 16-bit configuration parameter
pho
.
The carrier phase shift is calculated as follows:
16
2
2
pho
,
with
pho
being the decimal value stored in carrier phase offset register.
Table 3 NCO configuration memory
Address (15 bits)
Bits
Description
TX(A/B): 0x0240
RX(A/B): 0x0440
15 – 9
8 – 5
4 – 1
0
Reserved
DTHBIT[3:0]: NCO bits to dither.
0000 – Dithering disabled
0001 – 1 bit dithering
(default)
...
1111 – 15 bit dithering
SEL[3:0]: Selects PHO or FCW to feed to NCO, according to MODE.
Shadow
register.
0000 – PHO0 or FCW0 selected
(default)
0001 – PHO1 or FCW1 selected
...
1111 – PHO15 or FCW15 selected
MODE: Memory table mode.
Shadow register.
1 – PHO table (data at addresses 0x4 to 0x13 are PHO)
0 – FCW table (data at addresses 0x2 to 0x20 are FCW)
(default)
Default
: 00000000 00100000
TX(A/B): 0x0241
RX(A/B): 0x0441
15 – 0
PHO[15:0]: NCO Phase offset register, when MODE = 0.
Default
: 00000000 00000000
TX(A/B): 0x0242
RX(A/B): 0x0442
15 – 0
FCW0[31:16]: NCO frequency control word register 0. MSB part.
Default
: 00000000 00000000
TX(A/B): 0x0243
RX(A/B): 0x0443
15 – 0
FCW0[15:0]: NCO frequency control word register 0. LSB part.
Default
: 00000000 00000000
TX(A/B): 0x0244
RX(A/B): 0x0444
15 – 0
FCW1[31:16]: NCO frequency control word register 1, when MODE = 0. MSB part.
PHO0[15:0]: NCO Phase offset register 0, when MODE = 1.
Default
: 00000000 00000000
TX(A/B): 0x0245
RX(A/B): 0x0445
15 – 0
FCW1[15:0]: NCO frequency control word register 1, when MODE = 0. LSB part.
PHO1[15:0]: NCO Phase offset register 1, when MODE = 1.
Default
: 00000000 00000000
Содержание LMS7002M Series
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