Lime Microsystems LMS7002M Series, Руководство по программированию и калибровке

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101
VCO_CoarseTuning_CGEN
Input Parameters: Fref_MHz, Fvco_des_MHz
Return Parameters:
Result
EN_COARSE_CKLGEN (0x0086[10]) := 1
COARSE_START_CGEN (0x008B[0]) := 0
EN_INTONLY_SDM_CGEN (0x0086[9]) := 1
SPDUP_VCO_CGEN (0x0086[15]) := 1
Nround := round(4*Fvco_des/Fref)
FRAC_SDM_CGEN[15:0] (0x0087[15:0]) := 0
FRAC_SDM_CGEN[19:16] (0x0088[3:0]) := 0
INT_SDM_CGEN [9:0] (0x0088[13:4]) := Nround-4
CSW_VCO_CGEN[7:0] (0x008B[8:1]) := 0
i := 7
TRY_CNT := 0
CSW_VCO_CGEN[i] (0x008B[1+i]) := 1
COARSE_START_CGEN (0x008B[0]) := 1
COARSE_STEPDONE_CGEN (0x008C[15])
== 1?
TRY_CNT := 1
TRY_CNT > MAX_TRY_CNT?
COARSEPLL_COMPO_CGEN (0x008C[14])
== 1?
CSW_VCO_CGEN[i] (0x008B[1+i]) := 0
COARSE_START_CGEN (0x008B[0]) := 0
EN_COARSE_CKLGEN (0x0086[10]) := 0
EN_INTONLY_SDM_CGEN (0x0086[9]) := 0
SPDUP_VCO_CGEN (0x0086[15]) := 0
Return Result.
END
NO
YES
NO
YES
NO
YES
i == 0?
i := i -1
NO
YES
Result := FALSE Result := TRUE
Initialization
Normal mode setting
Figure 31 CGEN VCO Coarse tuning algorithm
C code for SXT/SXR VCO coarse tuning:
unsigned char VCO_CoarseTuning_SXT_SXR (float Fref_MHz, float Fvco_des_MHz, unsigned char ch)
{
unsigned short Nround;
unsigned char i, try_cnt;
MIMO_Ctrl(ch);//SXT SXR selection
// Initialization
Modify_SPI_Reg_bits (0x011C, 12, 12, 1); // 1) EN_COARSEPLL=1, a. VCO control voltage is switched to a DC =VDD/2
Modify_SPI_Reg_bits (0x0121, 0, 0, 0); // 2) COARSE_START=0
Modify_SPI_Reg_bits (0x011C, 9, 9, 1); // 3) EN_INTONLY_SDM=1
Modify_SPI_Reg_bits (0x011C, 14, 14, 1); // 4) SHORT_NOISEFIL=1 SPDUP_VCO_ Short the noise filter resistor to speed up the settling time
Nround = (unsigned short)(4*Fvco_des_MHz/F0.5); // 5) Nround=round(4*Fvco_des/Fref)
Modify_SPI_Reg_bits (0x011D, 15, 0, 0); // 6) FRAC_SDM=0
Modify_SPI_Reg_bits (0x011E, 3, 0, 0);
Modify_SPI_Reg_bits (0x011E, 13, 4, (Nround-4)); // 7) INT_SDM=Nround-4
Modify_SPI_Reg_bits (0x0121, 10, 3, 0); // 9) Set SWC_VCO<7:0>=<00000000>
i=7;// 10) i=7
//Decision - Loop Section
while(1)
{
Modify_SPI_Reg_bits (0x0121, 3 + i, 3 + i, 1); // SWC_VCO<i>=1
Modify_SPI_Reg_bits (0x0121, 0, 0, 1); // COARSE_START=1