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GDK-100
DIGITAL KEY TELEPHONE SYSTEM
28
2.4.11.4 E1IB (E1(CEPT) Interface Board)
The E1 line interface is based on the existing interface described in G.703, 704, 823 which is based
upon CCITT Recommendations I.431 and provides modifications and further requirements. It is also
affected by CCITT Recommendation, G.703, G.823 for what belongs to the electrical level. It covers data
rate at 2048kbit/sec which is used in Europe. Two interfaces circuit, one per transmission direction, are
used for the transmission of digital signals. Data & bit clock are transmitted by the NT master and
extracted by TE slave.
The PLL devices extract the reference clock from the bit stream and generate the system main clock
32.768MHZ and data clock 2.048MHZ, 4.096MHZ which are synchronized. The Frame has a duration of
125usec and contains 32 time slots (TSs) of 8 bits. TS 0 is allocated to frame alignment sync. and TS 16
is allocated to signaling channel; the other TSs are available for allocation to the B channel. MITEL’s
CEPT PCM30 interface device, which provides a complete interface between a 2.048Mbit/s digital stream
and MITEL ST-BUS, is applied.
E1IB should be installed in any of slot No. 1-7.
A PLLU MUST be installed for proper operation.
One E1IB can be installed in a system.
Add-on board: CPTU
!
Note:
1. The existing E1IB supports only Decadic Pulse and DTMF signaling, but not MFC R2
signaling.
2. It is designed to comply with the special national specification and application, so it
may not suitable for the other national specification and/or application.
Содержание GDK-100
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