Lattice Semiconductor ECP5-5G, Руководство пользователя

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23
ECP5-5G Versa Development Board
Figure 18. 10/100/1000-T PHY #2/RJ45
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
MH1 and MH2 are 0.100" diam
eter plated
thro
u
gh holes
Ethernet RJ45 Connector
Place caps close to RJ45 jack
Place termination resistors RX_D0-3, RX_CLK, TX_CLK, as close to the G-PHY as possible using 50 ohm impedence traces.
Place termination resistors TX_D0-3, TX_CLK as close to FPGA as possible using 50 ohm impedence traces.
TX and RX traces are all matched length < 2"
Phy2_CLK125 = C17/PCLKT0_0 (Default) Phy2_CLK125Pll = J20/PCLKT2
Schematic symbols rev 4.1
Bank 2
Place SERDES 0 ohm resistors near PHY
PH Y2_LED2
E
T
H2_MD1_
N
E
T
H2_MD2_P
E
T
H2_MD1_P
E
T
H2_MD3_
N
E
T
H2_MD3_P
PH
Y
2
_
L
E
D
0
E
T
H2_MD2_
N
E
T
H2_MD0_P
E
T
H2_MD0_
N
PH
Y
2
_
L
E
D
1
Phy2_A
v
dd3-3
Phy2_A
v
dd3-3
Phy2_A v dd3-3
Phy2_A v dd1- 8
Phy2_
V
ddo2-
5
Phy2_D
v
dd
Phy2_Xtal_I N
Phy2_Xtal_OUT
PHY2_LED 0
PHY2_LED 1
PHY2_LED 2
Phy2_TXD
0
Phy2_TXD
2
Phy2_TXD
1
Phy2_TXD
3
Phy2_TXC
L
K
Phy2_TXC
TR
L
Phy2_A
v
dd1-
8
Phy2_A
v
dd1-
8
Phy2_A v dd1- 8
Phy2_A v dd1- 8
Phy2_A v dd1- 8
Phy2_D v dd
Phy2_D v dd
Phy2_D v dd
Phy2_A
v
dd3-3
Phy2_Xtal_OU
T
Phy2_A
v
dd1-
8
Phy2_Xtal_
I
N
E
T
H2_MD0_
N
E
T
H2_MD0_P
E
T
H2_MD1_P
Phy2_R
XC
TR
L
Phy2_R
XD
0
Phy2_R
XD
1
Phy2_R
XC
L
K
E
T
H2_MD1_
N
E
T
H2_MD2_P
Phy2_R
XD
2
E
T
H2_MD2_
N
E
T
H2_MD3_P
E
T
H2_MD3_
N
Phy2_Mdi
o
Phy2_Mdc
P
h
y
2
_
R
esetn
Phy2_R
XD
3
Phy2_ V ddo2-5
Phy2_
V
ddo2
-5
Phy2_
V
ddo2
-5
Phy2_ V ddo2-5
P
h
y
2
_
C
onfi
g
Phy2_R
XD
0
Phy2_R
XD
1
Phy2_R
XD
2
Phy2_R
XD
3
Phy2_TXD
0
Phy2_TXD
2
Phy2_TXD
1
Phy2_TXD
3
Phy2_TXC
L
K
Phy2_TXC
TR
L
S
W
IT
C
H
6
Phy2_R
XC
L
K
S
W
IT
C
H
5
S
W
IT
C
H
6
S
W
IT
C
H
7
S
W
IT
C
H
5
S
W
IT
C
H
8
Phy2_C
lk12
5
Ph
y2
_C
lk125PI
I
Phy2_C
lk
1
2
5
Phy2_C
lk
1
25P
II
Phy2_Mdi
o
Phy2_Mdc Phy2_R
e
s
e
tn
Phy2_C
onfig
S
W
IT
C
H
8
S
W
IT
C
H
7
LED2 LED3 LED6 LED1 LED7 LED0 LED5 LED4 PH
Y
2
_RXCTR
L
2_5
V
3_3
V
2_5
V
2_5
V
2_5
V
S
W
IT
CH[
1:
8
][
8
]
LED[0:7]
[
8
]
HDRX
P
0
_
D
1CH1
[4
]
HDRX
N
0_D1CH1
[4
]
HDT
X
P
0
_
D
1CH1
[4
]
HDT
X
N
0_D1CH1
[4
]
Da
te
:
Size
S
c
hematic Re
v
of
Sheet
Title
Lattice Semicond
u
ctor Applications
Email: te
c
h
s
u
p
p
o
rt@Latti
c
e
s
e
m
i.c
o
m
Boar
d
R
e
v
P
roject
B
A
10
10/100/1000-T PHY
#2/RJ45
ECP5-5G
V
ERSA E
v
al Boar
d
A
W
ednesday
, Septem
b
e
r 23,
2015
6
Da
te
:
Size
S
c
hematic Re
v
of
Sheet
Title
Lattice Semicond
u
ctor Applications
Email: te
c
h
s
u
p
p
o
rt@Latti
c
e
s
e
m
i.c
o
m
Boar
d
R
e
v
P
roject
B
A
10
10/100/1000-T PHY
#2/RJ45
ECP5-5G
V
ERSA E
v
al Boar
d
A
W
ednesday
, Septem
b
e
r 23,
2015
6
Da
te
:
Size
S
c
hematic Re
v
of
Sheet
Title
Lattice Semicond
u
ctor Applications
Email: te
c
h
s
u
p
p
o
rt@Latti
c
e
s
e
m
i.c
o
m
Boar
d
R
e
v
P
roject
B
A
10
10/100/1000-T PHY
#2/RJ45
ECP5-5G
V
ERSA E
v
al Boar
d
A
W
ednesday
, Septem
b
e
r 23,
2015
6
R10
8
100R-0402SMT
Y3 25MH
Z
1
1
3
3
G1
2
G2
4
R295
50R-0402SMT
C40 8
10 N F-0402SMT
C269
10
u
F-6.3
V
-0
8
05SM
T
RL
P
-133
R109
0R-0402SMT
C145
100 N F-0603SMT
C272 27pF-0603SMT RLP
-132
R116
0R-0402SMT
C2
8
4
100
N
FX5R-0402SMT
RLP
-130-A
TP11
R119
0R-0402SMT
R100
0R-0402SMT
C41 8
1000pF-0402SMT
R111
20
R9
8
0R-0402S
M
T
R101
0R-0402SMT
R103 0R-0402SMT
U15
88
E1512_56QF
N
RX_CTR
L
43
RXD[0]
44
RXD[1]
45
RX_CLK
46
RXD[2]
47
RXD[3]
4
8
V
DDO
49
TXD[0]
50
TXD[1]
51
V
DDO
52
TX_CLK
53
TXD[2]
54
TXD[3]
55
TX_CTR
L
56
S_I N P
1
S_I NN
2
A V DD1 8
3
S_OUTP
4
S_OUT N
5
D V DD
6
MDC
7
MDIO
8
CLK125
9
V DDO_SEL
10
V DDO
11
LED[2]/I N Tn
12
LED[1]
13
LED[0]
14
MDIP[0]
2
8
MDI
N
[0
]
27
A
V
DD1
8
26
A
V
DD33
25
MDIP[1]
24
MDI
N
[1
]
23
MDIP[2]
22
MDI
N
[2
]
21
A
V
DD33
20
A
V
DD1
8
19
MDIP[3]
1
8
MDI
N
[3
]
17
RESET
n
16
CO
N
FIG
15
D V DD
42
REGCAP2
41
D V DD_OUT
40
A V DD1 8 _OUT
39
A V DD1 8
3 8
REGCAP1
37
REG_I N
36
A V DDC1 8
35
XTAL_I N
34
XTAL_OUT
33
HSDACP
32
HSDAC N
31
RSET
30
RSTPT
29
V
SS
57
R110
0R-0402SMT
C415
1000pF-0402SMT
C416
100 N F-0402SMT
U4
5
R0_1-
3
3
1
2
C413
10 N F-0402SMT
C2
8
1
100
N
FX5R-0402SMT
RLP
-130-A
C2
8
3
100
N
FX5R-0402SMT
RLP
-130-A
C412
100 N F-0402SMT
C271
27pF-0603SMT
RLP
-132
C2
8
5
100
N
FX5R-0402SMT
RLP
-130-A
C274 100
N
FX5R-0402SMT
RLP
-130-A
Gr/Yel Yel
1 2 3 6 4 5 7 8
RJ45
0
8
26-1X2T-23-F
J9A 1_MDCCT
1
1_MDIC-
2 3 4
1_MDIB-
5
1_MDIBCT
6
1_MDDCT
7 8
1_MDID-
9
1_MDIA-
10 11
1_MDACT
12
1_LED1
-
13
1_LED1
+
14
1_LED2
-
15
1_LED2
+
16
1_SHLD1
19
1_SHLD2
20
R107
100R-0402SMT
C409
1000pF-0402SMT
C26
8
10
u
F-6.3
V
-0
8
05SM
T
RL
P
-133
C276 4.7
u
F-16-0
8
05SMT
RLP
-133
FB20
Z-600 ohm / 742792
6
1
2
R106
4_7K-0402SMT
C410
10 N F-0402SMT
C146
10 N F-0402SMT
C407
100 N F-0402SMT
C147
100 N F-0603SMT
R120
0R-0402SMT
R115
0R-0402SMT
R300
0R-0402SMT
R105
4_7K-0402SMT-D N I
D
N
I
R11
8
0R-0402SMT
R99
2
0
R104
4_7K-0402SMT
R301
0R-0402SMT-D
N
I
D
N
I
C273
220
N
F-0402SMT
RLP
-130-A
R117
0R-0402SMT
R293 50R-0402SMT
R94
0
R-0402S
M
T
C279
100
N
FX5R-0402SMT
RLP
-130-A
C417
10 N F-0402SMT
C27
8
100
N
FX5R-0402SMT
RLP
-130-A
C414
100 N F-0402SMT
R112
0R-0402SMT
LFE5UM-45F-BG3
8
1
U1
C
V
CCIO2
H1
4
V
CCIO2
H1
5
V
CCIO2
J1
5
PR11A/URC_GPLL0T_I
N
C1
8
PR11B/URC_GPLL0C_I
N
/S0_I
N
D17
PR11C/URC_GPLL0T_MFGOUT2
E16
PR11D/URC_GPLL0C_MFGOUT2
F16
PR14A/S0_OUT
D1
8
PR14B/S1_I
N
E17
PR14C
E1
8
PR14D
F1
8
PR17A/URC_GPLL0T_MFGOUT1
F17
PR17B/URC_GPLL0C_MFGOUT1
G1
8
PR17C
G1
6
PR17D
H16
PR20
A
H1
8
PR20
B
H17
PR20C
J1
7
PR20D
J1
6
PR23A/S1_OUT
C20
PR23B/S2_I
N
D19
PR23C/
V
REF1_2
D20
PR23D
E19
PR26
A
E20
PR26
B
F19
PR26C
F20
PR26D
G2
0
PR29A/GR_PCLK2_1
G1
9
PR29
B
H20
PR29C/GR_PCLK2_0
J1
8
PR29D
K1
8
PR32A/PCLKT2_1/S2_OUT
J1
9
PR32B/PCLKC2_1
K19
PR32C/PCLKT2_0/S3_I
N
J2
0
PR32D/PCLKC2_0
K20
C2
8
0
100
N
FX5R-0402SMT
RLP
-130-A
R9
3
0R-0402SMT
R102
0R-0402SMT
R275
4_7K-0402SMT
C2
8
2
100
N
FX5R-0402SMT
RLP
-130-A
R296 4.99k
C275 100
N
FX5R-0402SMT
RLP
-130-A
FB19
Z-600 ohm / 742792
6
1
2
C411
1000pF-0402SMT