Kontron EPIC/CE, Руководство пользователя

Страница: 66 / 101

23 Appendix A: System-Resource Allocation
Kontron User's Guide EPIC/CE 66
23.5 Peripheral Component Interconnect (PCI) Devices
All devices follow the PCI 2.1 specification. The BIOS and OS control memory and I/O resources. Please
refer to the PCI 2.1 specification for details.
PCI Device (IDSEL) PCI IRQ REQ/ GNT Comment
AGP Graphic - -
Separate bus,
integrated in Intel chipset
Intel Ethernet (AD24) INTE# Discrete channel
Davicom Ethernet (AD17 INTD# REQ#3/GNT#3
PC/104-Plus allows 3 external masters REQ#0,
REQ#1 and REQ#2
AC97 Sound INTB#
Separate bus,
integrated in Intel chipset
1
st
UHCI USB Controller INTA# -
Separate bus,
integrated in Intel chipset
2
nd
UHCI USB Controller INTD# -
Separate bus,
integrated in Intel chipset
3
rd
UHCI USB Controller INTC# -
Separate bus,
integrated in Intel chipset
EHCI USB Controller INTH#
Separate bus,
integrated in Intel chipset
23.6 SM Bus Devices
The EPIC/CE uses an onboard SM (System Management) Bus. This bus is available on the JFLEX-extension
connector. Look at the JFLEX specification, which is available on the Kontron Web site, for signal
location.
The following SM Bus addresses are already used on the EPIC/CE.
SM Bus Address SM Device Comment
10h/11h SM-Bus Host Integrated in Intel ICH4
A0h/A1h SPD EEPROM Part of the DDR SDRAM module
D2h/D3h Clock Generator
Note: Accesses to the onboard SM Bus devices that are not allowed may cause system failures. Problems resulting
from this are not under warranty!