Keysight Technologies M8132A, Руководство пользователя

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Keysight M8132A 640 GSa/s Digital Signal Processor User’s Guide
6 Remote Programming
STATus:PRESet
Clears all status group event registers. Presets the status group enables
PTR and NTR registers as follows:
ENABle = 0x0000, PTR = 0xffff, NTR = 0x0000
Status Byte Register
The Status Byte summary register reports conditions from the other status
registers. Data that is waiting in the instrument’s output buffer is
immediately reported on the “Message Available” bit (bit 4) for example.
Clearing an event register from one of the other register groups will clear
the corresponding bits in the Status Byte condition register. Reading all
messages from the output buffer, including any pending queries, will clear
the “Message Available” bit. To set the enable register mask and generate
an SRQ (service request), you must write a decimal value to the register
using the
*SRE
command.
Table 8 Status byte register
Bit Number Decimal Value Definition
0 Not used 1 Not Used. Returns “0”
1 Not used 2 Not Used. Returns “0”
2 Error Queue 4 One or more errors are stored in the Error Queue
3 Questionable Data 8 One or more bits are set in the Questionable Data
Register (bits must be enabled)
4 Message Available 16 Data is available in the instrument’s output buffer
5 Standard Event 32 One or more bits are set in the Standard Event Register
6 Master Summary 64 One or more bits are set in the Status Byte Register
7 Operational Data 128 One or more bits set in the Operation Data Register (bits
must be enabled)