Kenwood TS-5700, Руководство по обслуживанию

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TS-5700
36
SEMICONDUCTOR DATA
Extended 1/0 : CXD 1 0950 (Control U n it IC5)
•
Term i n a l connection diagram
5 1 33
52
32
0 0
64
20
1 9
•
Term i n a l function
Pin Name Port 1/0 Deta ils
1 , 2 N C
3 M O P B 1 0 M i cro p h o n e i n p ut switc h i n g
" H " :
N o r m a l m icrop h o n e i n p ut, " L " : Others
4 M 1 P B 2 0 M i cro p h o n e i n p ut switc h i n g
" H " :
Packet i n put, " L " : Others
5 M 2 P B 3 0 M i cro p h o n e i n put switc h i n g
" H " :
D R U-3A i n put, " L " : Others
6 O R E N PB4 0 E n a b l e " H " : DR U-3A seria l para l l e l reg ister throu g h , " L" : D R U-3A seria l/para l l e l reg ister latch
7 VE N 1 P B 5 0 E n a b l e " L " : TX-RX u n i t D A C register t h ro u g h , " H " : TX-RX u n i t D A C register latch
8 R E N 1 P B 6 0 E n a b l e
"H" : TX-RX
u n it seria l/pa rallel reg ister through,
"L" : TX-RX
u n it seria l/parallel reg ister latch
9 R E N 2 P B 7 0 E n a b l e
"L" : TX-RX
u n it seria l/parallel register through,
"H" : TX-RX
u n it seria l/pa ral lel reg ister latch
1 0 Vss G N D
1 1 TY P E S P C O I Destination " L " : 50W, " H " : 1 00W
1 2 TY PE9 P C 1 I Desti nation " L" : N ot' g e n e ra l cover i n TX, " H " : G e neral cover i n TX
1 3 50WSW PC2 I Sett i n g c h e c k " L " : W i t h o u t restrict i o n , " H " : Restriction on 50W
1 4- 1 7 K3 - KO PC3 - PC6 I Key matrix
1 8 U L K PC7 I State check " L " : PLL u n lock, " H " : Others , normal
1 9 N C
2 0
P E N 1
P D Q 0 E n a b l e
" H " :
P L L 1 register t h ro u g h , " L" : P L L 1 register latch
2 1 P E N 2 P D 1
0 E n a b l e
" H " :
PLL2 reg i ster t h r o u g h , " L" : P L L2 register latch
22 D E N 1 PD2
0 E n a b l e
" H " :
D D S 1 register t h r o u g h , " L" : D D S 1 reg i ster latch
23 D E N 2 PD3
0 E n a b l e
" H " :
D D S 2 register t h r o u g h , " L " : D D S 2 register latch
24 B LAN K PD4 0 LCD d river control " H " : Display goes off
2 5 Vss G N D
2 6 Vdd 5V
27 L E N 1 P D 5
0
E n a b l e " H " :
LC D 1 d river register t h ro u g h , " L" : LC D 1 d river register latch
2 8 L E N 2 PD6
0
E n a b l e " H " :
LCD2 d river register t h ro u g h , " L" : LCD2 d river reg ister latch
29 LEN3 PD7 0 E n a b l e
" H " : LCD3 d river register t h ro u g h , " L" : LCD3 d river reg ister latch
3 0 - 3 2 I A D O - IAD2 D 0 - 0 2 1/0 Pseudo b u s
3 3 , 34 N C
3 5 - 3 9 IAD3 - IAD7 0 3 - 0 7 1/0 Pseudo b u s
4 0
C L R I
4 1 O D E N I
42
Vss G N D
43 WR I
44 R D
I