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TK-5310

CIRCUIT DESCRIPTION

5. PLL Frequency Synthesizer

The PLL Frequency Synthesizer consists of the following

components:
• VCXO (X100)
• VCO (Q106, Q107)
• Doubler (Q110, Q111)
• PLL IC (IC101)
• Local switch (D200, D308)

5-1. VCXO (X100)

VCXO (X100) generates a reference frequency of 16.8

MHz for the PLL frequency synthesizer. This reference
frequency is applied to pin 8 of the PLL IC (IC101).

The VCXO oscillation frequency is fine-adjusted by

controlling the voltage applied to pin 1 of the VCXO with DAC
(IC462). It is also controlled with pin 1 of the VCXO if the
output from VCXO is modulated.

5-2. VCO

There is a RX VCO and a TX VCO.
The TX VCO (Q107) generates a transmit carrier and the

RX VCO (Q106) generates a 1st local receive signal.

The oscillation frequency is as follows.

K, K2, and K3 types

Q106 : 400.050 ~ 449.995MHz
Q107 : 450.000 ~ 520.000MHz

K4, K5, and K6 types

Q106 : 330.050 ~ 379.995MHz
Q107 : 380.000 ~ 470.000MHz

The VCO oscillation frequency is determined by one

system of operation switching terminal "T/R" and two
systems of voltage control terminals "C/V" and "V-assist".

The operation switching terminal, "T/R", is controlled by the

control line (T/R) output from the CPU (IC5). When the T/R
logic is low, the VCO (Q107) outputs the transmit carrier and
when it is high, VCO (Q106) outputs a 1st local receive signal.

The voltage control terminals, "CV" and "V-assist", are

controlled by the PLL IC (IC101) and CPU (IC5) and the output
frequency changes continuously according to the applied
voltage. “V-assist” is controlled directly by a microcomputer
to change the VCO oscillation frequency at high speed.
However, its accuracy is low and the VCO frequency cannot
be matched accurately with the desired transmit carrier or
the 1st local receive signal. “CV” is controlled by the PLL and
is used to accurately match (look) the desired frequency of
the VCO oscillation frequency. For the modulation input
terminal, "MOD", the output frequency changes according to

the applied voltage. This is used to modulate the VCO output.
"MOD" works only when "T/R" is low.

5-3. Doubler (Q110, Q111)

The doubler (Q110, Q111) extracts the twice harmonic

component from the signal output from the VCO. This twice
harmonic component is then fed into pin 5 of the PLL IC.

5-4. PLL IC (IC101)

PLL IC compares the differences in phases of the VCO

oscillation frequency and the VCXO reference frequency,
returns the difference to the VCO CV terminal and realizes
the "Phase Locked Loop" for the return control. This allows
the VCO oscillation frequency to accurately match (lock) the
desired frequency.

When the frequency is controlled by the PLL, the

frequency convergence time increases as the frequency
difference increases when the set frequency is changed. To
supplement this, the CPU is used before control by the PLL
IC to bring the VCO oscillation frequency close to the desired
frequency. As a result, the VCO CV voltage does not change
and is always stable at approx. 2.5 V.

The desired frequency is set for the PLL IC by the CPU

(IC5) through the 3-line "LE", "DAT", "CLK" serial bus. Whether
the PLL IC is locked or not is monitored by the CPU through
the “UL” signal line. If the VCO is not the desired frequency
(unlock), the "UL" logic is low.

5-5. Local Switch (D200, D308)

The connection destination of the signal output from the

VCO is changed with the diode switch (D200) that is
controlled by the transmission power supply, 5T, and the
diode switch (D308) that is controlled by the receive power
supply, 5R.

If the 5T logic is high, it is connected to a send-side pre-

pre-drive (Q200). If the 5T logic is low, it is connected to a
receive-side mixer (IC302).

Fig. 8

PLL block diagram

T/R

IC100

V-assist

DC AMP

DAT
CLK

Q109

Q112

D200