1-27
TH-A30
1. Block diagram
2. Truth table
BA7612F (VIC3) : Video signal switcher
1
2
3
4
8
7
6
5
IN1
CTLA
CTLB
IN2
GND
IN3
V
CC
V
OUT
MUTE
LOGIC
75
Ω
6dB
OUT
IN1
H
IN2
H
IN3
H
H
MUTE
L (OPEN)
L (OPEN)
L (OPEN)
L (OPEN)
CTL A
CTL B
TDA7440D (U2) : Audio processor
1. Terminal layout
2. Block diagram
0/30dB
2dB STEP
MUXO-L IN(L)
VOLUME
VOLUME
TREBLE
TREBLE
TRE(L)
MUXO-R IN(R)
TRE(R)
BOUT(L)
SPKR ATT
LEFT
LOUT
SCL
SDA
DGND
ROUT
I
2
CBUS D LATCHES
100K
100K
100K
100K
G
LIN1
LIN2
LIN3
LIN4
100K
100K
100K
100K
RIN1
RIN2
RIN3
RIN4
G
INPUT MULTIPLEXER
+ GAIN
BASS
BIN(L)
BASS
SPKR ATT
RIGHT
BOUT(R)
BIN(R)
SUPPLY
CREF
AGND
VS
27
4
5
6
7
3
2
1
28
21
22
20
26
24
25
10
11
19
12
13
23
8
9
18
14
15
R
B
R
B
V
REF
LIN3
LIN4
MUXO-L
IN(L)
MUXO-R
BIN(R)
IN(R)
BOUT(R)
BIN(L)
1
3
2
4
5
6
7
8
9
BOUT(L)
LP
PS1
TRE(R)
TRE(L)
SCL
SDA
DGND
CREF
23
22
21
20
19
17
18
16
15
10
11
12
13
14
28
27
26
25
24
RIN3
RIN2
RIN1
LIN1
LIN2
VS
AGND
ROUT
LOUT
RIN4
2. Block diagram
1. Pin layout
3. Pin function
W29EE512 (DU5) : Flash memory
Symbol
A0~A15
DQ0~DQ7
CE
OE
WE
Vcc
GND
NC
Function
Address input
Data I/O
Chip enable
Output enable
Write enable
Power
Ground
No connect
V
DD
Vss
A0
A15
DQ0
DQ7
CS
OE
WE
CONTROL
OUTPUT
BUFFER
DECODER
CORE
ARRY
4 3 2 1 32 31 30
5
6
7
8
9
10
11
12
13
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
DQ7
A12
A15
NC
NC
Vcc
WE
NC
DQ1
DQ2
GND
DQ3
DQ4
DQ5
DQ6
14 15 16 17 18 19 20
Содержание TH-A30
Страница 29: ...1 29 TH A30 M E M O ...
Страница 38: ...H A B C D E F G 2 6 TH A30 TH A30 oard Switch board Display board d circuit boards ...
Страница 39: ...A B C D E F G 2 7 TH A30 ain board Jack board ...
Страница 40: ...H A B C D E F G 2 8 TH A30 TH A30 ader board Forward side DVD MPEG board Forward side ...
Страница 41: ...A B C D E F G 2 9 TH A30 DVD loader board Reverse side VD MPEG board Reverse side ...
Страница 42: ...H A B C D E F G 2 10 TH A30 TH A30 e side ard d side ...
Страница 43: ...TH A30 M E M O ...
Страница 65: ...TH A30 3 21 M E M O ...