MX-DVA9/MX-DVA9R
1-37
AN8702FH
PC1
PC01
PC2
PC02
TGBAL
TBAL
FBAL
POFLT
DTRD
IDGT
STANDBY
SEN
SCK
STDI
RSEL
JLINE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RFINN
RFINP
TESTSG
AGCO
AGCG
PEAK
BOTTOM
RFENV
BDO
OFTR
DCRF
RFC
VCC3
RFOUT
RFDIFO
GND3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
HDTYPE
VIN12
VIN11
GND1
VIN4
VIN3
VIN2
VIN1
VREF1
VCC1
VIN10
VIN9
VIN8
VIN7
VIN6
VIN5
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
TEN
TEOUT
ASN
ASOUT
FEN
FEOUT
VSS
TG
VDD
GND2
VREF2
VCC2
VHALF
DFLTON
DFLTOP
DSFLT
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
AN8702FH(IC101):Frontend processor
1.Pin layout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Tangential phase balance control terminal
Tracking balance control terminal
Focus balance control terminal
Track detection threshold level terminal
Data slice part data read signal input terminal
(For RAM)
Data slice part address part gate signal input
terminal( For RAM)
Standby mode control terminal
SEN(Serial data input terminal)
SCK(Serial data input terminal)
STDI(Serial data input terminal)
Tracking error signal output terminal
Focus error output amplifier reversing input terminal
Focus error signal output terminal
Connect to GND
Tangential phase error signal output terminal
Power supply terminal 3V
Connect to GND
VREF2 voltage output terminal
Power supply terminal 5V
VHALF voltage output terminal
Connect to GND
I
I
I
O
I
I
I
I
I
I
O
I
O
-
O
-
-
O
-
O
-
Pin No.
Symbol
PC1
PC01
PC2
PC02
TGBAL
TBAL
FBAL
POFLT
DTRD
IDGT
STANDBY
SEN
SCK
STDI
RSEL
JLINE
TEN
TEOUT
ASN
ASOUT
FEN
FEOUT
VSS
TG
VDD
GND2
VREF2
VCC2
VHALF
DFLTON
DFLTOP
DSFLT
GND3
I/O
Description
Pin No.
Symbol
I/O
Description
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
RFDIFO
RFOUT
VCC3
RFC
DCRF
OFTR
BDO
RFENV
BOTTOM
PEAK
AGCG
AGCO
TESTSG
RFINP
RFINN
VIN5
VIN6
VIN7
VIN8
VIN9
VIN10
VCC1
VREF1
VIN1
VIN2
VIN3
VIN4
GND1
VIN11
VIN12
HDTYPE
-
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
-
O
I
I
I
I
-
I
I
Power supply terminal 5V
All addition amplifier capacitor terminal
OFTR output terminal
RF envelope output terminal
Bottom envelope detection filter terminal
Peak envelope detection filter terminal
AGC amplifier gain control terminal
TEST signal input terminal
RF signal positive input terminal
RF signal negative input terminal
RF input of external division into 4 terminal for CD
Power supply terminal 5V
VREF1 voltage output terminal
External division into four (DVD/CD) RF input
terminal1
External division into four (DVD/CD) RF input
terminal2
External division into four (DVD/CD) RF input
terminal3
External division into four (DVD/CD) RF input
terminal4
Connect to GND
2.Pin function
I
O
Input for Laser current monitor
Laser power control output for DVD
I
Photo detector fo CD
Laser power control output for CD
O
I
DVD and CD selection
I
J-line setting output (FEP)
I
Tracking error output amplifier reversing input terminal
I
O
Filter amplifier reversing output terminal
O
Filter amplifier output terminal
Connected capacitor terminal for filter output
O
O
O
O
Off set adjustment terminal for DRC
All added signal output terminal
RF operation output terminal
RF output terminal
I
Filter for RF amplifier
O
BDO output terminal
O
AGC amplifier level control terminal
RF input of external division into 4 terminal for CD
RF input of external division into 4 terminal for CD
RF input of external division into 4 terminal for CD
RF input of external division into 2 terminal for DVD
RF input of external division into 2 terminal for DVD
3 beem sub input terminal for CD
3 beem sub input terminal for CD
I
HD type switching