̶
31
̶
SW-4000M-PMCL
[Binning On]
Tap
Geometry
Bit/
Pixel
CL
Pixel
Clock
[MHz]
Delay time
From Trigger
to EEN rising
[A](usec)
Period From
EEN Falling
to LVAL rising
[B](usec)
EEN
invalid
time [C]
(usec)
Data
invalid
time [D]
(CLK)
Data
valid
time [F]
(CLK)
Line
Period
[G]
(CLK)
Delay time
From Trigger
falling to EEN
falling [H](usec)
1X2
8/10
31.70
7.7
13.9
0.068
10
2048
2058
7.8
42.41
7.7
13.8
0.068
7
2048
2065
7.8
63.39
7.7
13.7
0.068
10
2048
2058
7.8
84.82
7.7
13.7
0.068
18
2048
2066
7.8
1X3
8
31.70
7.7
13.9
0.068
7
1364
1371
7.8
42.41
7.7
13.8
0.068
12
1364
1376
7.8
63.39
7.7
13.7
0.068
8
1364
1372
7.8
84.82
7.7
13.7
0.068
265
1364
1629
7.8
1X4
8/10
31.70
7.7
13.9
0.068
5
1024
1029
7.8
42.41
7.7
13.8
0.068
9
1024
1033
7.8
63.39
7.7
13.7
0.068
193
1024
1217
7.8
84.82
7.7
13.7
0.068
605
1024
1629
7.8
1X8
8/10
31.70
7.7
13.9
0.068
97
512
609
7.8
42.41
7.7
13.8
0.068
302
512
814
7.8
63.39
7.7
13.7
0.068
705
512
1217
7.8
84.82
7.7
13.7
0.068
1117
512
1629
7.8
1X10
8
31.70
7.7
13.9
0.068
200
409
609
7.8
42.41
7.7
13.8
0.068
405
409
814
7.8
63.39
7.7
13.7
0.068
808
409
1217
7.8
84.82
7.7
13.7
0.068
1220
409
1629
7.8