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RSR GNSS Transcoder™ User Manual
Table 3.3 ISP#/Zeroize and RESET# Connector J3
3.6.3 RF SMA Connector J5
Connector J5 serves a dual purpose: the simulated/synthesized L1 GPS C/A code is transmitted via
SMA connector J5, and antenna DC power from the external GPS receiver is dissipated through an
internal 186 Ohms DC resistive load. This allows J5 to be directly connected to generic GPS Antenna
input connectors on standard GPS receivers, while at the same time simulating the load presented to
the receiver by a typical GPS antenna system. GPS receivers such as the Rockwell Collins DAGR
GPS will use this load to sense external antenna connectivity, and to automatically switch-over to the
external antenna connection. On some GPS receivers this load may prevent antenna fault indications.
The RF output level on connector J5 is variable from about -100dBm to less than -125dBm via SCPI
command. Various L1 frequency test tones can also be activated via SCPI command on connector J5.
These test tones are useful as jamming signals for testing, or to verify RF output power levels.
Do not feed more than 6V DC antenna voltage into connector J5 to prevent overloading of the
internal load resistors.
12V antenna voltages such as the Microsemi/Symmetricom XLI units
present on their antenna inputs may damage the unit due to overheating
. For products with
excessive antenna voltage an RF DC-block should be used on connector J5.
3.6.4 Optional CSAC Holdover Oscillator
The RSR GNSS Transcoder™ module can be ordered with an optional CSAC holdover oscillator
installed. The CSAC oscillator provides short-term-stability (STS) improvements, as well as
significant holdover and thermal-stability improvements compared to the standard internal TCXO,
and allows the unit to provide an atomic quality time/frequency reference to the GPS simulation even
in the absence of any external NMEA/GNSS or 1PPS timing references. The internal TCXO is still
used as a phase-noise and spur-filter oscillator for the CSAC as it is tightly phase-locked to the
CSAC via an analog PLL. This improves the phase-noise of the 10MHz output on connector J4 as
Ref
Name
Function
Specification
J3-1
ISP#/Zeroize#
Places processor into
In System
Programming mode.
Alternatively zeroizes
external SAASM GPS
receiver.
Leave floating during normal
operation, or pull to Ground
during power-on or during a
Reset event to enable ISP
mode. Internally pulled to
3.3V.
Pulling this pin low during
normal operation will cause
a Zeroize command to be
sent to the external SAASM
GPS.
J3-2
Ground
Ground
Ground
J3-3
RST#
Resets main
processor and FPGA
Pull to Ground momentarily
to Reset the board. Leave
floating during normal
operation. Internally pulled
to 3.3V
Содержание RSR GNSS Transcoder
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