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i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Exp.
Pin No
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
16 USB3_HUB4_TXM NA O, USB SS USB3.0 Hub Transmit channel 4
Minus.
20 USB3_HUB4_RXP NA I, USB SS USB3.0 Hub Receive channel 4 Plus.
22 USB3_HUB4_RXM NA I, USB SS USB3.0 Hub Receive channel 4 Minus.
2.8.4 ESAI Interface (Optional)
The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port for serial communication with a variety of
serial devices, the ESAI consists of independent transmitter and receiver sections, each section with its own clock
generator. ESAI has three basic operating modes and many data/operation formats. ESAI operating mode are selected
by the ESAI control registers.
ESAI1 of i.MX8 Processor is connected to board expansion connector, refer below table:
Exp.
Pin No
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
65 ESAI1_FST ESAI1_FST/
BF12 O, 1.8V CMOS ESAI1 Frame Sync Output.
75 ESAI1_SCKR ESAI1_SCKR/
BD12 I, 1.8V CMOS ESAI1 Clock Input.
77 ESAI1_FSR ESAI1_FSR/
BE11 I, 1.8V CMOS ESAI1 Frame Sync Input.
81 ESAI1_TX0 ESAI1_TX0/
BF10 O, 1.8V CMOS ESAI1 Transmit 0.
87 ESAI1_TX1 ESAI1_TX1/
BA11 IO, 1.8V CMOS ESAI1 Transmit 1.
89 ESAI1_TX4_RX1 ESAI1_TX4_RX1/
AY12 IO, 1.8V CMOS ESAI1 Transmit 4 or Receive 1.
92 ESAI1_SCKT ESAI1_SCKT/
AY10 O, 1.8V CMOS ESAI1 Clock Out.
96 ESAI1_TX3_RX2 ESAI1_TX3_RX2/
AV10 IO, 1.8V CMOS ESAI1 Transmit 3 or Receive 2.
98 ESAI1_TX2_RX3 ESAI1_TX2_RX3/
AU11 IO, 1.8V CMOS ESAI1 Transmit 2 or Receive 3.
100 ESAI1_TX5_RX0 ESAI1_TX5_RX0/
AT10 IO, 1.8V CMOS ESAI1 Transmit 5 or Receive 0.
2.8.5 SPDIF Interface (Optional)
The Sony/Philips Digital Interface (SPDIF) audio block is a stereo transceiver that allows the processor to receive and
transmit digital audio. The SPDIF is composed of two parts: SPDIF Receiver and SPDIF Transmitter.
The SPDIF receiver extracts the audio data from each SPDIF frame and places the data in the SPDIF Rx left and right
FIFOs. The Channel Status and User Bits are also extracted from each frame and placed in the corresponding registers.
The SPDIF receiver also provides a bypass option for direct transfer of the SPDIF input signal to the SPDIF transmitter.