Intel SPSH4 - Server Platform - 0 MB RAM, Технические характеристики продукции

Страница: 76 / 118

SCSI Bay Boardset SPSH4 Server System External Product Specification
Revision 1.11 64
6.5.2.2 P1
P1 has two dedicated-function signals, and six implementation specific control signals, as
shown in Table 51.
Table 51: P1 Functions
Bit Name I/O Fixed
1
Function
7 SDA I/O Y I
2
C Serial Data signal for the intra-chassis I
2
C bus.
6 SCL I/O Y I
2
C Serial Clock signal for the intra-chassis I
2
C bus.
5 I2C_ADDR_CNTR
L
I N I
2
C address control:
•
1=primary HSBP controller
•
0=secondary HSBP controller
Following the I
2
C Address Allocation Specification the primary HSBP
controller has an I
2
C address of 0xC0 and the secondary controller has
an I
2
C address of 0xC2.
4 SCSI ctrlr reset O N Reset SCSI controller.
•
If 0, places the 53C80S SCSI chip into reset
•
If 1, the SCSI interface chip comes out of reset and operates
normally.
3 SCSI_DRQ I N SCSI DMA Request. Connected to the DRQ signal of the 53C80S
SCSI chip. Allows the microcontroller to use the DMA transfer
capabilities of the SCSI interface chip, which results in higher
performance.
2 Fan Power O N Switches fan power on or off.
•
0=on
•
1=off
1 SDA_Local I/O N Serial Data for private I
2
C connection to temperature sensor
0 SCL_Local O N Serial Clock for private I
2
C connection to temperature sensor
1. “Fixed” indicates whether the function/pin is defined by the microcontroller pinout (fixed) or implementation-
specific (not fixed)
6.5.2.3 P2
P2 is the high-order address and data bus for external device access. It is not used for general
I/O purposes.