Intel Itanium 9150M, Руководство пользователя

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3:16 Volume 3: Instruction Reference
alloc
alloc — Allocate Stack Frame
Format: (
qp
) alloc
r
1
= ar.pfs,
i
,
l
,
o
,
r
M34
Description:
A new stack frame is allocated on the general register stack, and the Previous Function
State register (PFS) is copied to GR
r
1
. The change of frame size is immediate. The write
of GR
r
1
and subsequent instructions in the same instruction group use the new frame.
The four parameters,
i
(size of inputs),
l
(size of locals),
o
(size of outputs), and
r
(size
of rotating) specify the sizes of the regions of the stack frame.
The size of the frame (sof) is determined by
i
+
l
+
o
. Note that this instruction may
grow or shrink the size of the current register stack frame. The size of the local region
(sol) is given by
i
+
l
. There is no real distinction between inputs and locals. They are
given as separate operands in the instruction only as a hint to the assembler about how
the local registers are to be used.
The rotating registers must fit within the stack frame and be a multiple of 8 in number.
If this instruction attempts to change the size of CFM.sor, and the register rename base
registers (CFM.rrb.gr, CFM.rrb.fr, CFM.rrb.pr) are not all zero, then the instruction will
cause a Reserved Register/Field fault.
Although the assembler does not allow illegal combinations of operands for alloc, illegal
combinations can be encoded in the instruction. Attempting to allocate a stack frame
larger than 96 registers, or with the rotating region larger than the stack frame, or with
the size of locals larger than the stack frame, or specifying a qualifying predicate other
than PR 0, will cause an Illegal Operation fault.
This instruction must be the first instruction in an instruction group and must either be
in instruction slot 0 or in instruction slot 1 of a template having a stop after slot 0;
otherwise, the results are undefined.
If insufficient registers are available to allocate the desired frame
alloc
will stall the
processor until enough dirty registers are written to the backing store. Such mandatory
RSE stores may cause the data related faults listed below.
Figure 2-2. Stack Frame
Local
GR32
sof
sol
Output
sor