Intel Itanium 9150M, Руководство пользователя

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3:248 Volume 3: Instruction Reference
shrp
shrp — Shift Right Pair
Format: (
qp
) shrp
r
1
=
r
2
,
r
3
,
count
6
I10
Description:
The two source operands, GR
r
2
and GR
r
3
, are concatenated to form a 128-bit value and
shifted to the right count
6
bits. The least-significant 64 bits of the result are placed in
GR
r
1
.
The immediate value count
6
can be any number in the range 0 to 63.
Operation: if (PR[ qp ]) {
check_target_register( r
1
);
temp1 = shift_right_unsigned(GR[ r
3
], count
6
);
temp2 = GR[ r
2
] << (64 - count
6
);
GR[ r
1
] = zero_ext(temp1, 64 - count
6
) | temp2;
GR[ r
1
].nat = GR[ r
2
].nat || GR[ r
3
].nat;
}
Interruptions:
Illegal Operation fault
Figure 2-44. Shift Right Pair
GR r
3
:
GR r
1
:
GR r
2
: