6.2. Running the Hello FPGA Example
The
hello_fpga
sample host application uses the OPAE library to test the hardware
in a native loopback (NLB) configuration. Load the FPGA with the
nlb_mode_0
AFU
image to run this example.
1. Run the following command to load the
hello_fpga
sample host application:
sudo fpgaconf $OPAE_PLATFORM_ROOT/hw/samples/nlb_mode_0/bin/\
nlb_mode_0.gbs
2. Configure the system hugepage to allocate 20, 2 MB hugepages that this utility
requires. This command requires root privileges:
sudo sh -c "echo 20 > /sys/kernel/mm/hugepages/\
hugepages-2048kB/nr_hugepages"
3. Change to the source code directory for
hello_fpga
located at
$OPAE_PLATFORM_ROOT/sw/opae*/samples/hello_fpga.c
:
cd $OPAE_PLATFORM_ROOT/sw
4. Extract the
tar
file:
tar xf opae*.tar.gz
5. Change to the OPAE directory:
cd opae*
6. Compile the example:
gcc -o hello_fpga -std=gnu99 -rdynamic \
-ljson-c -luuid -lpthread -lopae-c -lm -Wl,-rpath \
-lopae-c $OPAE_PLATFORM_ROOT/sw/opae*/samples/hello_fpga.c
7. To run the example, type the following command:
sudo ./hello_fpga
Sample output:
Running Test
Done Running Test
The Acceleration Stack 2.0 Release includes the following working AFU images in the
$OPAE_PLATFORM_ROOT/hw/samples
directory:
•
dma_afu/bin/dma_afu.gbs
•
dma_afu/bin/streaming_dma_afu.gbs
•
hello_afu/bin/hello_afu.gbs
•
hello_intr_afu/bin/hello_intr_afu.gbs
•
hello_mem_afu/bin/hello_mem_afu.gbs
•
nlb_mode_0/bin/nlb_mode_0.gbs
•
nlb_mode_3/bin/nlb_mode_3.gbs
•
eth_e2e_e10/bin/
6. Running the OPAE in a Non-Virtualized Environment
UG-20202 | 2019.08.05
Intel Acceleration Stack Quick Start Guide: Intel FPGA Programmable
Acceleration Card D5005
18
