82571EB/82572EI EEPROM Information Guide
17
1.7.18
PCIe* Control (Word 1Bh)
This word is used to configure the initial settings for the PCIe* default functionality.
1.7.19
LED 1-3 Configuration Defaults (Word 1Ch)
This EEPROM word specifies the hardware defaults for the LEDCTL register fields controlling the
LED1 (ACTIVITY indication) and LED3 (LINK_1000 indication) output behaviors.
Table 15. PCIe* Control
Bit
Name
Description
15
Reserved
Reserved. Set to 1b.
14:11
Reserved
Reserved. Set to 0000b.
10
Reserved
Reserved. Set to 1b.
9:7
Reserved
Reserved. Set to 000b.
6:2
Reserved
Reserved. Set to 00000b.
1:0
Reserved
Reserved. Set to 11b.
Table 16. LED 1-3 Configuration Defaults (Word 1Ch)
Bit
Name
Description
15
LED3 Blink
Initial value of.LED3_BLINK field.
0b = Non-blinking.
1b = Blinking.
14
LED3 Invert
a
Initial value of LED3_IVRT field.
0b = None inverted (active-low output).
1b = Inverted (active-high output).
13
LED3 Blink
Mode
LED3 Blink Mode.
0b = Blink at 200 ms on and 200 ms off.
1b = Blink at 83 ms on with no defined off time.
12
Reserved
Reserved. Set to 0b.
11:8
LED3 Mode
Initial value of the LED3_MODE field specifying what event/state/pattern
is displayed on the LED3 (LINK_1000) output. A value of 0111b (7h)
indicates 1000 MB/s operation. See
for all available LED modes.
7
LED1 Blink
Initial value of LED1_BLINK field.
0b = Non-blinking.
1b = Blinking.
6
LED1 Invert
a
Initial value of LED1_IVRT field.
0b = Not inverted (active-low output).
1b = Inverted (active-high output).
5
LED1 Blink
Mode
LED1 Blink Mode.
0b = Blink at 200 ms on and 200 ms off.
1b = Blink at 83 ms on with no defined off time.
