82571EB/82572EI EEPROM Information Guide
10
1.7.8
Software Defined Pins Control (Word 10h/20h)
These words are used to configure the initial settings of the Software Definable Pins.
Note:
Word 10h is for LAN1 (Port 1/Port B) and Word 20h is for LAN0 (Port 0/Port A).
Bit
Name
Description
1
Enable Speed
Smart Power Down.
When set, enables PHY Smart Power Down mode. Image default
is 0b.
0
Reserved
Reserved. Set to 1b.
Table 5. Initialization Control Word 2 (Word 0Fh)
Table 6. Software Defined Pins Control (Word 10h/20h)
Bit
Name
Description
15
SDPDIR[3]
SDP3 Pin - Initial Direction.
This bit configures the initial hardware value of the
SDP3_IODIR
bit in the
Extended Device Control register (CTRL_EXT) following power up. This
relates to the SDP0/SDP1 ports, respectively, for LAN0/LAN1.
0b = Input.
1b = Output.
14
SDPDIR[2]
SDP2 Pin - Initial Direction.
This bit configures the initial hardware value of the
SDP2_IODIR
bit in the
Extended Device Control register (CTRL_EXT) following power up. This
relates to the SDP0/SDP1 ports, respectively, for LAN0/LAN1.
0b = Input.
1b = Output.
13:12
Reserved
Reserved. Set to 00b.
11
LAN_DIS
LAN Disable.
When set to 1b, the appropriate LAN is disabled.
0b = Enable.
1b = Disable.
10
LAN _PCI_DIS
LAN PCI Disable.
When set to 1b, the appropriate LAN PCI function is disabled. For
example, the LAN is functional for MNG operation but is not connected to
the host through PCIe*.
0b = Enable.
1b = Disable.
9
SDPDIR[1]
SDP1 Pin - Initial Direction.
This bit configures the initial hardware value of the
SDP1_IODIR
bit in the
Device Control register (CTRL) following power up. This relates to the
SDP0/SDP1 ports, respectively, for LAN0/LAN1.
0b = Input.
1b = Output.