82571EB/82572EI EEPROM Information Guide
15
lists the different combinations for bits 13 and 11 of word 14h, 24h.
Table 10. Bits 13 and 11 Combinations of Word 14h, 24h
1.7.14
Firmware Start Address; Including PHY Initialization Area (Word 17h)
1.7.15
PCIe* Init Configuration Word 1 (Word 18h)
This word is used to set the defaults for some internal registers as well as enable/disable specific
features.
Bit 13 (Flash Disable)
Bit 11 (Boot Disable)
Functionality
(Active Window)
0b
0b
Flash and Expansion ROM BARs are active.
0b
1b
Flash BAR enabled Expansion ROM BAR disabled.
1b
0b
Flash BAR disabled Expansion ROM BAR enabled.
1b
1b
Flash and Expansion ROM BARs are disabled.
Table 11. Firmware Start Address (Word 17h)
Bit
Name
Description
15:0
Address
Defines the word address in the EEPROM of the PHY and SerDes
initialization space. The first words in the initialization space define the
area ID (PHY Init), its size and a pointer to the next block address. It is
the responsibility of the firmware to use the content of the initialization
space for the PHY and SerDes initialization as well as read the next
fields.
Table 12. PCIe* Init Configuration Word 1 (Word 18h)
Bit
Name
Description
15
Reserved
Reserved. Set to 0b.
14:12
Reserved
Reserved. Set to 110b.
11:9
Reserved
Reserved. Set to 110b.
8:6
Reserved
Reserved. Set to 011b.
5:3
Reserved
Reserved. Set to 110b.
2:0
Reserved
Reserved. Set to 110b.
