
Revision 0.9
19
PC SGRAM Specification
8.3.1.1
Precharge Termination of a Burst Read
Burst Read (with no autoprecharge) can be terminated earlier using a precharge command along
with the DQM. This terminates reads when the remaining data elements are not needed. It allows
starting the precharge early. The remaining data is undefined. DQM should be used to mask.
8.3.1.2
Precharge Command After a Burst Write
The earliest time that precharge can be issued is T
DPL
clocks after the last data.
8.3.1.3
Precharge Termination of a Burst Write
To terminate Burst Write early with precharge command DQM signal should be used as shown.
Data sampled T
DPL
clocks before precharge command will be written correctly. Data sampled
after and before the precharge command is undefined. DQM should be used to prevent the location
from being corrupted.
8.3.2
Read Terminated By Read
A Read Command should terminate the previous read command and the data should be available
after CAS Latency for the new command. Fastest command to command delay is determined by
T
CCD
8.3.3
Write Terminated By Write
A Write Command should terminate the previous write command and the new burst write
command should start with the new command as shown. Fastest command to command delay is
determined by T
CCD
.
8.3.4
Read Terminated By Write
A Write Command should terminate the previous read command and the new burst write should
start. The DQM must be held active to keep the output buffer in HiZ as shown to prevent the
internal IO buffer conflict between the read data (in pipe) and the write data driven on the input
pins.
8.3.5
Write Terminated By Read
A Read Command should terminate the previous write command and the new burst read should
start as shown. In case of with T
CCD
=1, CL=3 and tdqz=2, there is no loss of data bandwidth even
if DQM is activated to mask the write data.
In the case of CL=2 and tdqz=2, the activation of DQM signal causes the first read data to be lost, if
read command is issued (T
CCD
=1). To preserve the first read data the issue of READ command
has to be delayed (T
CCD
=2). This implementation reduces the command bus utilization.
If a Precharge-All command is detected by SGRAM component in CLK(n), then there will be no
commands presented to this component until CLK(n+tRP).
bank command.
Содержание 740
Страница 1: ...Intel740 Graphics Accelerator Design Guide August 1998 Order Number 290619 003 ...
Страница 9: ...1 Introduction ...
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Страница 13: ...2 Intel740 Graphics Accelerator Addin Card Design ...
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Страница 40: ...Addin Card Design 2 26 Intel740 Graphics Accelerator Design Guide ...
Страница 57: ...3 Intel740 Graphics Accelerator 3 Device AGP Motherboard Design ...
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Страница 86: ...3 Device AGP MotherBoard Design 3 28 Intel740 Graphics Accelerator Design Guide ...
Страница 128: ...4 Thermal Considerations ...
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Страница 131: ...Thermal Considerations 4 2 Intel740 Graphics Accelerator Design Guide ...
Страница 132: ...5 Mechanical Information ...
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Страница 139: ...Mechanical Information 5 6 Intel740 Graphics Accelerator Design Guide ...
Страница 140: ...6 Third Party Vendors ...
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Страница 144: ...A Application Notes ...
Страница 145: ...Intel740 Graphics Accelerator Application Note 653 Thermal Design Considerations April 1998 Order Number 292211 002 ...
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Страница 185: ...B Reference Information ...
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Страница 187: ...PC SGRAM Specification Revision 0 9 February 1998 Order Number Not Applicable ...
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