IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -90
Q216: CY22393FXCT (Clock Generator)
TX-NR905/NA905
Name
Pin Number
Description
CLKC
1
Configurable clock output C
V
DD
2
Power supply
AGND
3
Analog Ground
XTALIN
4
Reference crystal input or external reference clock input
XTALOUT
5
Reference crystal feedback
XBUF
6
Buffered reference clock output
LV
DD
N/A
Low Voltage Clock Output Power Supply
CLKD or LCLKD
7
Configurable clock output D; LCLKD referenced to LVDD
P–CLK
N/A
LV PECL Output
CLKE or LCLKE
8
Configurable clock output E; LCLKE referenced to LVDD
P+ CLK
N/A
LV PECL Output
CLKB or LCLKB
9
Configurable clock output B; LCLKB referenced to LVDD
CLKA or LCLKA
10
Configurable clock output A; LCLKA referenced to LVDD
GND/LGND
11
Ground
SDAT (S0)
12
Two Wire Serial Port Data. S0 value latched during start-up
SCLK (S1)
13
Two Wire Serial Port Clock. S1 value latched during start-up
AV
DD
14
Analog Power Supply
S2/
SUSPEND
15
General Purpose Input for Fre
Suspend mode control input
SHUTDOWN/
OE
16
Places outputs in three-state condition and shuts down chip
when LOW. Optionally, only places outputs in three-state
condition and does not shut down chip when LOW
TERMINAL DESCRIPTION