Infineon XMC Series, Инструкция по применению

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Introduction to Digital Power Conversion
XMC4000/1000 Family
PWM Generation
Application Guide 30 V1.0, 2015-01
Monitoring the FOT pulse rate
The FOT pulse rate is monitored by the free running f
max
–min
timer (Slice2). This timer is flushed on
each FOT timer start.
If the next ZCD event occurs before the f
max
-period compare event, then the next FOT start must wait
because of f
max
-period. If no ZCD occurs, then the FOT-start has to wait for the timeout.
The FOT timer will start on the falling edge of the f
max
–min
timer status.
There can be any of three different event flow scenarios behind a FOT pulse start, depending on
whether the ZCD-event occurs after or before the ZCD, or if there is no ZCD at all, in relation to the
f
max
-period compare event (here named CMP-event).
All event flow scenarios will terminate by an end-of-FOT event, alias EOF-event.
Notes:
1. For readability, all redundant actions in the event flows described here have been removed.
2. All event flow scenarios will begin and end with the status bit of all timers = 0; i.e. ST0=0, ST1=0, ST2=0,
ST3=0.
3.
 = “consequently the successive event will follow”.
4.
// = “a parallel (synchronous) event flow, connected to the root event”.
5.
STn=STm means “Status-bit Override; i.e. status bit STn is copied with status bit STm”.
6.
# = “inverted value of”.
CRM Mode: Event Flow
‘after’
i.e. ZCD-event > CMP-event
1. CMP-event: ST2=1
2. ZCD-event: ST1=ST2 (

FOT)

flush-Slice2

ST2=0

start-Slice1
3. EOF-event: ST1=0
DCM Mode: Event Flow
‘before’
i.e. ZCD-event < CMP-event
1. ZCD-event: Start-Slice0 // Start-Slice3

ST3=1 (delayed 1 clk by compare)
2. CMP-event: ST2=1

capture-Slice0

ST0=1

ST2=#ST3

start-Slice1

ST1=1 (

FOT)

(flush- stop&flush-Slice0)
3. EOF-event: ST1=0

stop&flush-Slice3

ST3=0
Event Flow “No ZCD”
No ZCD at all until due f
min
-period = Timeout at Slice2 Period-Match
1. CMP-event: ST2=1
2. Timeout: ST2=0

Start-Slice1

ST1=1 (

FOT)

flush-Slice2
3. EOF-event: ST1=0
The Auxiliary Timer (Slice0). Monitoring the DCM Window
This timer is essential for the status bit-
override “ST2=#ST3” operation specifically, since there is no
direct “ST2=1  ST2=#ST3” event interconnectivity path; i.e. a slice cannot event request itself.
Optionally, Slice0 will work as a DCM window monitor.